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Searched refs:XCHAL_DCACHE_IS_WRITEBACK (Results 1 – 25 of 29) sorted by relevance

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/openbmc/linux/arch/xtensa/kernel/
H A Dhead.S254 #if XCHAL_DCACHE_IS_WRITEBACK
318 #if XCHAL_DCACHE_IS_WRITEBACK
334 #if XCHAL_DCACHE_IS_WRITEBACK
H A Dpci-dma.c70 if (XCHAL_DCACHE_IS_WRITEBACK) in arch_sync_dma_for_device()
/openbmc/linux/arch/xtensa/boot/boot-redboot/
H A Dbootstrap.S117 #if XCHAL_DCACHE_IS_WRITEBACK
224 #if XCHAL_DCACHE_IS_WRITEBACK
/openbmc/qemu/tests/tcg/xtensa/
H A Dtest_cache.S69 #if XCHAL_DCACHE_IS_WRITEBACK
/openbmc/linux/arch/xtensa/include/asm/
H A Dcacheflush.h51 #if XCHAL_DCACHE_IS_WRITEBACK
/openbmc/linux/arch/xtensa/variants/fsf/include/variant/
H A Dcore.h122 #define XCHAL_DCACHE_IS_WRITEBACK 0 /* writeback feature */ macro
/openbmc/qemu/target/xtensa/core-fsf/
H A Dcore-isa.h124 #define XCHAL_DCACHE_IS_WRITEBACK 0 /* writeback feature */ macro
/openbmc/linux/arch/xtensa/variants/test_mmuhifi_c3/include/variant/
H A Dcore.h137 #define XCHAL_DCACHE_IS_WRITEBACK 1 /* writeback feature */ macro
/openbmc/qemu/target/xtensa/core-dsp3400/
H A Dcore-isa.h164 #define XCHAL_DCACHE_IS_WRITEBACK 1 /* writeback feature */ macro
/openbmc/qemu/target/xtensa/core-lx106/
H A Dcore-isa.h157 #define XCHAL_DCACHE_IS_WRITEBACK 0 /* writeback feature */ macro
/openbmc/qemu/target/xtensa/core-dc232b/
H A Dcore-isa.h128 #define XCHAL_DCACHE_IS_WRITEBACK 1 /* writeback feature */ macro
/openbmc/linux/arch/xtensa/variants/dc232b/include/variant/
H A Dcore.h129 #define XCHAL_DCACHE_IS_WRITEBACK 1 /* writeback feature */ macro
/openbmc/qemu/target/xtensa/core-test_mmuhifi_c3/
H A Dcore-isa.h188 #define XCHAL_DCACHE_IS_WRITEBACK 1 /* writeback feature */ macro
/openbmc/u-boot/arch/xtensa/include/asm/arch-dc232b/
H A Dcore.h127 #define XCHAL_DCACHE_IS_WRITEBACK 1 /* writeback feature */ macro
/openbmc/qemu/target/xtensa/core-dc233c/
H A Dcore-isa.h167 #define XCHAL_DCACHE_IS_WRITEBACK 1 /* writeback feature */ macro
/openbmc/u-boot/arch/xtensa/include/asm/arch-dc233c/
H A Dcore.h146 #define XCHAL_DCACHE_IS_WRITEBACK 1 /* writeback feature */ macro
/openbmc/linux/arch/xtensa/variants/dc233c/include/variant/
H A Dcore.h168 #define XCHAL_DCACHE_IS_WRITEBACK 1 /* writeback feature */ macro
/openbmc/linux/arch/xtensa/variants/test_kc705_hifi/include/variant/
H A Dcore.h188 #define XCHAL_DCACHE_IS_WRITEBACK 1 /* writeback feature */ macro
/openbmc/linux/arch/xtensa/variants/de212/include/variant/
H A Dcore.h216 #define XCHAL_DCACHE_IS_WRITEBACK 1 /* writeback feature */ macro
/openbmc/linux/arch/xtensa/variants/csp/include/variant/
H A Dcore.h216 #define XCHAL_DCACHE_IS_WRITEBACK 1 /* writeback feature */ macro
/openbmc/qemu/target/xtensa/core-test_kc705_be/
H A Dcore-isa.h216 #define XCHAL_DCACHE_IS_WRITEBACK 1 /* writeback feature */ macro
/openbmc/u-boot/arch/xtensa/include/asm/arch-de212/
H A Dcore.h194 #define XCHAL_DCACHE_IS_WRITEBACK 1 /* writeback feature */ macro
/openbmc/linux/arch/xtensa/variants/test_kc705_be/include/variant/
H A Dcore.h217 #define XCHAL_DCACHE_IS_WRITEBACK 1 /* writeback feature */ macro
/openbmc/qemu/target/xtensa/core-de212/
H A Dcore-isa.h225 #define XCHAL_DCACHE_IS_WRITEBACK 1 /* writeback feature */ macro
/openbmc/qemu/target/xtensa/core-sample_controller/
H A Dcore-isa.h239 #define XCHAL_DCACHE_IS_WRITEBACK 0 /* writeback feature */ macro

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