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Searched refs:VM_1_10_MBARE (Results 1 – 4 of 4) sorted by relevance

/openbmc/qemu/target/riscv/
H A Dcpu.c343 return VM_1_10_MBARE; in satp_mode_from_str()
392 case VM_1_10_MBARE: in satp_mode_str()
405 case VM_1_10_MBARE: in satp_mode_str()
436 cpu->cfg.satp_mode.map = (1 << VM_1_10_MBARE); in set_satp_mode_default_map()
501 set_satp_mode_max_supported(cpu, VM_1_10_MBARE); in rv64_sifive_e_cpu_init()
663 set_satp_mode_max_supported(cpu, VM_1_10_MBARE); in rv32_sifive_e_cpu_init()
680 set_satp_mode_max_supported(cpu, VM_1_10_MBARE); in rv32_ibex_cpu_init()
702 set_satp_mode_max_supported(cpu, VM_1_10_MBARE); in rv32_imafcu_nommu_cpu_init()
H A Dcpu_bits.h637 #define VM_1_10_MBARE 0 macro
H A Dcpu_helper.c965 case VM_1_10_MBARE: in get_physical_address()
H A Dcsr.c1456 [VM_1_10_MBARE] = true,
1461 [VM_1_10_MBARE] = true,