/openbmc/linux/arch/powerpc/platforms/powernv/ |
H A D | vas-window.c | 220 write_hvwc_reg(window, VREG(LPID), 0ULL); in reset_window_regs() 221 write_hvwc_reg(window, VREG(PID), 0ULL); in reset_window_regs() 222 write_hvwc_reg(window, VREG(XLATE_MSR), 0ULL); in reset_window_regs() 223 write_hvwc_reg(window, VREG(XLATE_LPCR), 0ULL); in reset_window_regs() 224 write_hvwc_reg(window, VREG(XLATE_CTL), 0ULL); in reset_window_regs() 225 write_hvwc_reg(window, VREG(AMR), 0ULL); in reset_window_regs() 226 write_hvwc_reg(window, VREG(SEIDR), 0ULL); in reset_window_regs() 227 write_hvwc_reg(window, VREG(FAULT_TX_WIN), 0ULL); in reset_window_regs() 228 write_hvwc_reg(window, VREG(OSU_INTR_SRC_RA), 0ULL); in reset_window_regs() 229 write_hvwc_reg(window, VREG(HV_INTR_SRC_RA), 0ULL); in reset_window_regs() [all …]
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/openbmc/linux/arch/parisc/include/asm/ |
H A D | pdc_chassis.h | 58 #define PDC_CHASSIS_LED_RUN_OFF (0ULL << 4) 62 #define PDC_CHASSIS_LED_ATTN_OFF (0ULL << 6) 65 #define PDC_CHASSIS_LED_FAULT_OFF (0ULL << 8) 160 #define PDC_CHASSIS_ALERT_FORWARD (0ULL << 36) /* no failure detected */ 175 #define PDC_CHASSIS_SRC_NONE (0ULL << 28) /* unknown, no source stated */ 192 #define PDC_CHASSIS_SRC_ID_UNSPEC (0ULL << 16) 195 #define PDC_CHASSIS_PB_D_PROC_NONE (0ULL << 32) /* no problem detail */ 210 #define PDC_CHASSIS_ACT_STATUS_UNSPEC (0ULL << 0) 214 #define PDC_CHASSIS_CALL_SACT_UNSPEC (0ULL << 4) /* implementation dependent */ 223 #define PDC_CHASSIS_REID_UNSPEC (0ULL << 44) [all …]
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/openbmc/linux/include/linux/ |
H A D | sizes.h | 46 #define SZ_4G _AC(0x100000000, ULL) 47 #define SZ_8G _AC(0x200000000, ULL) 48 #define SZ_16G _AC(0x400000000, ULL) 49 #define SZ_32G _AC(0x800000000, ULL) 51 #define SZ_1T _AC(0x10000000000, ULL) 52 #define SZ_64T _AC(0x400000000000, ULL)
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H A D | bits.h | 11 #define BIT_ULL_MASK(nr) (ULL(1) << ((nr) % BITS_PER_LONG_LONG)) 40 (((~ULL(0)) - (ULL(1) << (l)) + 1) & \ 41 (~ULL(0) >> (BITS_PER_LONG_LONG - 1 - (h))))
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H A D | bitfield.h | 87 __BF_FIELD_CHECK(_mask, 0ULL, 0ULL, "FIELD_MAX: "); \ 100 __BF_FIELD_CHECK(_mask, 0ULL, 0ULL, "FIELD_FIT: "); \ 114 __BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_PREP: "); \
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/openbmc/linux/drivers/crypto/cavium/nitrox/ |
H A D | nitrox_hal.c | 290 nitrox_write_csr(ndev, NPS_PKT_IN_RERR_LO_ENA_W1S, (~0ULL)); in enable_nps_pkt_interrupts() 291 nitrox_write_csr(ndev, NPS_PKT_IN_RERR_HI_ENA_W1S, (~0ULL)); in enable_nps_pkt_interrupts() 292 nitrox_write_csr(ndev, NPS_PKT_IN_ERR_TYPE_ENA_W1S, (~0ULL)); in enable_nps_pkt_interrupts() 294 nitrox_write_csr(ndev, NPS_PKT_SLC_RERR_HI_ENA_W1S, (~0ULL)); in enable_nps_pkt_interrupts() 295 nitrox_write_csr(ndev, NPS_PKT_SLC_RERR_LO_ENA_W1S, (~0ULL)); in enable_nps_pkt_interrupts() 376 nitrox_write_csr(ndev, offset, 0ULL); in nitrox_config_aqm_rings() 402 nitrox_write_csr(ndev, AQM_DBELL_OVF_LO_ENA_W1S, (~0ULL)); in enable_aqm_interrupts() 403 nitrox_write_csr(ndev, AQM_DBELL_OVF_HI_ENA_W1S, (~0ULL)); in enable_aqm_interrupts() 404 nitrox_write_csr(ndev, AQM_DMA_RD_ERR_LO_ENA_W1S, (~0ULL)); in enable_aqm_interrupts() 405 nitrox_write_csr(ndev, AQM_DMA_RD_ERR_HI_ENA_W1S, (~0ULL)); in enable_aqm_interrupts() [all …]
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/openbmc/linux/arch/mips/include/asm/octeon/ |
H A D | cvmx-address.h | 300 #define CVMX_OCT_DID_MIS 0ULL /* misc stuff */ 324 #define CVMX_OCT_DID_TAG_SWTAG CVMX_FULL_DID(CVMX_OCT_DID_TAG, 0ULL) 330 #define CVMX_OCT_DID_FAU_FAI CVMX_FULL_DID(CVMX_OCT_DID_IOB, 0ULL) 331 #define CVMX_OCT_DID_TIM_CSR CVMX_FULL_DID(CVMX_OCT_DID_TIM, 0ULL) 332 #define CVMX_OCT_DID_KEY_RW CVMX_FULL_DID(CVMX_OCT_DID_KEY, 0ULL) 334 #define CVMX_OCT_DID_MIS_BOO CVMX_FULL_DID(CVMX_OCT_DID_MIS, 0ULL) 335 #define CVMX_OCT_DID_PCI_RML CVMX_FULL_DID(CVMX_OCT_DID_PCI, 0ULL) 339 #define CVMX_OCT_DID_ZIP_CSR CVMX_FULL_DID(CVMX_OCT_DID_ZIP, 0ULL)
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/openbmc/u-boot/include/ |
H A D | div64.h | 72 ___m = (~0ULL / ___b) * ___p; \ 73 ___m += (((~0ULL % ___b + 1) * ___p) + ___b - 1) / ___b; \ 76 ___x = ~0ULL / ___b * ___b - 1; \ 88 if (~0ULL % (___b / (___b & -___b)) == 0) { \ 91 ___m = ~0ULL / (___b / (___b & -___b)); \ 105 ___m = (~0ULL / ___b) * ___p; \ 106 ___m += ((~0ULL % ___b + 1) * ___p) / ___b; \
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/openbmc/linux/include/asm-generic/ |
H A D | div64.h | 83 ___m = (~0ULL / ___b) * ___p; \ 84 ___m += (((~0ULL % ___b + 1) * ___p) + ___b - 1) / ___b; \ 87 ___x = ~0ULL / ___b * ___b - 1; \ 99 if (~0ULL % (___b / (___b & -___b)) == 0) { \ 102 ___m = ~0ULL / (___b / (___b & -___b)); \ 116 ___m = (~0ULL / ___b) * ___p; \ 117 ___m += ((~0ULL % ___b + 1) * ___p) / ___b; \
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/openbmc/linux/tools/include/linux/ |
H A D | bits.h | 11 #define BIT_ULL_MASK(nr) (ULL(1) << ((nr) % BITS_PER_LONG_LONG)) 40 (((~ULL(0)) - (ULL(1) << (l)) + 1) & \ 41 (~ULL(0) >> (BITS_PER_LONG_LONG - 1 - (h))))
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H A D | bitfield.h | 84 __BF_FIELD_CHECK(_mask, 0ULL, 0ULL, "FIELD_MAX: "); \ 97 __BF_FIELD_CHECK(_mask, 0ULL, 0ULL, "FIELD_FIT: "); \ 111 __BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_PREP: "); \
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/openbmc/linux/arch/arm64/kvm/hyp/include/nvhe/ |
H A D | fixed_config.h | 141 #define PVM_ID_AA64ZFR0_ALLOW (0ULL) 152 #define PVM_ID_AA64DFR0_ALLOW (0ULL) 153 #define PVM_ID_AA64DFR1_ALLOW (0ULL) 158 #define PVM_ID_AA64AFR0_ALLOW (0ULL) 159 #define PVM_ID_AA64AFR1_ALLOW (0ULL)
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/openbmc/linux/arch/x86/include/asm/ |
H A D | segment.h | 14 ((((base) & _AC(0xff000000,ULL)) << (56-24)) | \ 15 (((flags) & _AC(0x0000f0ff,ULL)) << 40) | \ 16 (((limit) & _AC(0x000f0000,ULL)) << (48-16)) | \ 17 (((base) & _AC(0x00ffffff,ULL)) << 16) | \ 18 (((limit) & _AC(0x0000ffff,ULL))))
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H A D | pgtable-3level.h | 105 return pxx_xchg64(pte, ptep, 0ULL); in native_ptep_get_and_clear() 110 return pxx_xchg64(pmd, pmdp, 0ULL); in native_pmdp_get_and_clear() 115 return pxx_xchg64(pud, pudp, 0ULL); in native_pudp_get_and_clear()
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/openbmc/linux/drivers/net/ethernet/marvell/octeontx2/af/ |
H A D | rvu_devlink.c | 85 rvu_write64(rvu, blkaddr, NIX_AF_RVU_INT_ENA_W1C, ~0ULL); in rvu_nix_af_rvu_intr_handler() 120 rvu_write64(rvu, blkaddr, NIX_AF_GEN_INT_ENA_W1C, ~0ULL); in rvu_nix_af_rvu_gen_handler() 155 rvu_write64(rvu, blkaddr, NIX_AF_ERR_INT_ENA_W1C, ~0ULL); in rvu_nix_af_rvu_err_handler() 190 rvu_write64(rvu, blkaddr, NIX_AF_RAS_ENA_W1C, ~0ULL); in rvu_nix_af_rvu_ras_handler() 209 rvu_write64(rvu, blkaddr, NIX_AF_RVU_INT_ENA_W1C, ~0ULL); in rvu_nix_unregister_interrupts() 210 rvu_write64(rvu, blkaddr, NIX_AF_GEN_INT_ENA_W1C, ~0ULL); in rvu_nix_unregister_interrupts() 211 rvu_write64(rvu, blkaddr, NIX_AF_ERR_INT_ENA_W1C, ~0ULL); in rvu_nix_unregister_interrupts() 212 rvu_write64(rvu, blkaddr, NIX_AF_RAS_ENA_W1C, ~0ULL); in rvu_nix_unregister_interrupts() 250 rvu_write64(rvu, blkaddr, NIX_AF_RVU_INT_ENA_W1S, ~0ULL); in rvu_nix_register_interrupts() 258 rvu_write64(rvu, blkaddr, NIX_AF_GEN_INT_ENA_W1S, ~0ULL); in rvu_nix_register_interrupts() [all …]
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/openbmc/u-boot/fs/btrfs/ |
H A D | ctree.h | 191 #define BTRFS_FEATURE_COMPAT_SUPP 0ULL 192 #define BTRFS_FEATURE_COMPAT_SAFE_SET 0ULL 193 #define BTRFS_FEATURE_COMPAT_SAFE_CLEAR 0ULL 199 #define BTRFS_FEATURE_COMPAT_RO_SAFE_SET 0ULL 200 #define BTRFS_FEATURE_COMPAT_RO_SAFE_CLEAR 0ULL 215 #define BTRFS_FEATURE_INCOMPAT_SAFE_CLEAR 0ULL
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/openbmc/linux/tools/perf/Documentation/ |
H A D | perf-dlfilter.txt | 231 PERF_DLFILTER_FLAG_BRANCH = 1ULL << 0, 232 PERF_DLFILTER_FLAG_CALL = 1ULL << 1, 233 PERF_DLFILTER_FLAG_RETURN = 1ULL << 2, 234 PERF_DLFILTER_FLAG_CONDITIONAL = 1ULL << 3, 235 PERF_DLFILTER_FLAG_SYSCALLRET = 1ULL << 4, 236 PERF_DLFILTER_FLAG_ASYNC = 1ULL << 5, 237 PERF_DLFILTER_FLAG_INTERRUPT = 1ULL << 6, 238 PERF_DLFILTER_FLAG_TX_ABORT = 1ULL << 7, 239 PERF_DLFILTER_FLAG_TRACE_BEGIN = 1ULL << 8, 240 PERF_DLFILTER_FLAG_TRACE_END = 1ULL << 9, [all …]
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/openbmc/linux/drivers/spi/ |
H A D | spi-fsi.c | 134 *value = 0ULL; in fsi_spi_read_reg() 233 *out = 0ULL; in fsi_spi_data_out() 257 return fsi_spi_write_reg(ctx, SPI_FSI_STATUS, 0ULL); in fsi_spi_reset() 295 seq->data = 0ULL; in fsi_spi_sequence_init() 304 u64 status = 0ULL; in fsi_spi_transfer_data() 309 u64 out = 0ULL; in fsi_spi_transfer_data() 335 u64 in = 0ULL; in fsi_spi_transfer_data() 369 u64 clock_cfg = 0ULL; in fsi_spi_transfer_init() 370 u64 status = 0ULL; in fsi_spi_transfer_init() 405 rc = fsi_spi_write_reg(ctx, SPI_FSI_COUNTER_CFG, 0ULL); in fsi_spi_transfer_init()
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/openbmc/linux/drivers/md/bcache/ |
H A D | bcache_ondisk.h | 13 { return (k->field >> offset) & ~(~0ULL << size); } \ 17 k->field &= ~(~(~0ULL << size) << offset); \ 18 k->field |= (v & ~(~0ULL << size)) << offset; \ 34 { return (k->ptr[i] >> offset) & ~(~0ULL << size); } \ 38 k->ptr[i] &= ~(~(~0ULL << size) << offset); \ 39 k->ptr[i] |= (v & ~(~0ULL << size)) << offset; \ 80 #define MAX_KEY_OFFSET (~0ULL >> 1)
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/openbmc/linux/include/vdso/ |
H A D | limits.h | 14 #define LLONG_MAX ((long long)(~0ULL >> 1)) 16 #define ULLONG_MAX (~0ULL)
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/openbmc/u-boot/include/linux/ |
H A D | const.h | 26 #define _ULL(x) (_AC(x, ULL)) 32 #define ULL(x) (_ULL(x)) macro
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H A D | bitfield.h | 74 __BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_FIT: "); \ 88 __BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_PREP: "); \
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/openbmc/linux/arch/arm64/kvm/hyp/nvhe/ |
H A D | sys_regs.c | 114 BUILD_BUG_ON(PVM_ID_AA64ZFR0_ALLOW != 0ULL); in get_pvm_id_aa64zfr0() 124 BUILD_BUG_ON(PVM_ID_AA64DFR0_ALLOW != 0ULL); in get_pvm_id_aa64dfr0() 134 BUILD_BUG_ON(PVM_ID_AA64DFR1_ALLOW != 0ULL); in get_pvm_id_aa64dfr1() 144 BUILD_BUG_ON(PVM_ID_AA64AFR0_ALLOW != 0ULL); in get_pvm_id_aa64afr0() 154 BUILD_BUG_ON(PVM_ID_AA64AFR1_ALLOW != 0ULL); in get_pvm_id_aa64afr1()
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/openbmc/linux/fs/btrfs/ |
H A D | fs.h | 17 #define BTRFS_OLDEST_GENERATION 0ULL 193 #define BTRFS_FEATURE_COMPAT_SUPP 0ULL 194 #define BTRFS_FEATURE_COMPAT_SAFE_SET 0ULL 195 #define BTRFS_FEATURE_COMPAT_SAFE_CLEAR 0ULL 203 #define BTRFS_FEATURE_COMPAT_RO_SAFE_SET 0ULL 204 #define BTRFS_FEATURE_COMPAT_RO_SAFE_CLEAR 0ULL 239 #define BTRFS_FEATURE_INCOMPAT_SAFE_CLEAR 0ULL
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/openbmc/linux/drivers/block/drbd/ |
H A D | drbd_vli.h | 141 *out = ((in & ((~0ULL) >> (64-t))) >> b) + adj; \ in vli_decode_bits() 261 val &= ~0ULL >> (64 - bits); in bitstream_put_bits() 312 val &= ~0ULL >> (64 - bits); in bitstream_get_bits()
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