| /openbmc/u-boot/drivers/serial/ |
| H A D | Kconfig | 12 meaning of either setting the baudrate for the early debug UART
32 In various cases, we need to specify which of the UART devices that
41 In very space-constrained devices even the full UART driver is too
42 large. In this case the debug UART can still be used in some cases.
43 This option enables the full UART in U-Boot, so if is it disabled,
44 the full UART driver will be omitted, thus saving space.
51 In very space-constrained devices even the full UART driver is too
52 large. In this case the debug UART can still be used in some cases.
53 This option enables the full UART in SPL, so if is it disabled,
54 the full UART driver will be omitted, thus saving space.
[all …]
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| H A D | serial_pxa.c | 177 #define pxa_uart(uart, UART) \ argument
180 return pxa_init_dev(UART##_INDEX); \
185 return pxa_setbrg_dev(UART##_INDEX); \
190 return pxa_putc_dev(UART##_INDEX, c); \
195 return pxa_puts_dev(UART##_INDEX, s); \
200 return pxa_getc_dev(UART##_INDEX); \
205 return pxa_tstc_dev(UART##_INDEX); \
221 #define pxa_uart_multi(uart, UART) \ argument
222 pxa_uart(uart, UART) \
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| /openbmc/linux/Documentation/devicetree/bindings/serial/ |
| H A D | mvebu-uart.txt | 1 * Marvell UART : Non standard UART used in some of Marvell EBU SoCs
6 - "marvell,armada-3700-uart" for the standard variant of the UART
10 UART (128 bytes FIFO, DMA, front interrupts, 8-bit or 32-bit
13 - clocks: UART reference clock used to derive the baudrate. If no clock
18 for standard variant of UART and UART2-clk for extended variant
19 of UART. TBG clock (with UART TBG divisors d1=d2=1) or xtal clock
24 respectively the UART sum interrupt, the UART TX interrupt and
25 UART RX interrupt. A corresponding interrupt-names property must
29 respectively the UART TX interrupt and the UART RX interrupt. A
33 containing only the UART sum interrupt. This form is deprecated
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| H A D | cirrus,clps711x-uart.txt | 1 * Cirrus Logic CLPS711X Universal Asynchronous Receiver/Transmitter (UART)
6 - interrupts: Should contain UART TX and RX interrupt.
7 - clocks: Should contain UART core clock number.
8 - syscon: Phandle to SYSCON node, which contain UART control bits.
14 Note: Each UART port should have an alias correctly numbered
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| H A D | arc-uart.txt | 1 * Synopsys ARC UART : Non standard UART used in some of the ARC FPGA boards
7 - clock-frequency : the input clock frequency for the UART
8 - current-speed : baud rate for UART
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| H A D | arm,mps2-uart.txt | 1 ARM MPS2 UART
6 - interrupts : Reference to the UART RX, TX and overrun interrupts
9 - clocks : The input clock of the UART
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| /openbmc/qemu/hw/char/ |
| H A D | grlib_apbuart.c | 79 OBJECT_DECLARE_SIMPLE_TYPE(UART, GRLIB_APB_UART)
81 struct UART { struct
99 static int uart_data_to_read(UART *uart) in uart_data_to_read() argument
104 static char uart_pop(UART *uart) in uart_pop()
128 static void uart_add_to_fifo(UART *uart, in uart_add_to_fifo()
141 UART *uart = opaque; in grlib_apbuart_can_receive()
148 UART *uart = opaque; in grlib_apbuart_receive()
170 UART *uart = opaque; in grlib_apbuart_read()
200 UART *uart = opaque; in grlib_apbuart_write()
250 UART *uart = GRLIB_APB_UART(dev); in grlib_apbuart_realize()
[all …]
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| H A D | trace-events | 66 cmsdk_apb_uart_read(uint64_t offset, uint64_t data, unsigned size) "CMSDK APB UART read: offset 0x%…
67 cmsdk_apb_uart_write(uint64_t offset, uint64_t data, unsigned size) "CMSDK APB UART write: offset 0…
68 cmsdk_apb_uart_reset(void) "CMSDK APB UART: reset"
69 cmsdk_apb_uart_receive(uint8_t c) "CMSDK APB UART: got character 0x%x from backend"
70 cmsdk_apb_uart_tx_pending(void) "CMSDK APB UART: character send to backend pending"
71 cmsdk_apb_uart_tx(uint8_t c) "CMSDK APB UART: character 0x%x sent to backend"
72 cmsdk_apb_uart_set_params(int speed) "CMSDK APB UART: params set to %d 8N1"
83 exynos_uart_dmabusy(uint32_t channel) "UART%d: DMA busy (Rx buffer empty)"
84 exynos_uart_dmaready(uint32_t channel) "UART%d: DMA ready"
85 exynos_uart_irq_raised(uint32_t channel, uint32_t reg) "UART%d: IRQ raised: 0x%08"PRIx32
[all …]
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| /openbmc/linux/arch/arm/mach-sa1100/include/mach/ |
| H A D | uncompress.h | 21 #define UART(x) (*(volatile unsigned long *)(serial_port + (x))) macro
29 if (UART(UTCR3) & UTCR3_TXE) break; in putc()
31 if (UART(UTCR3) & UTCR3_TXE) break; in putc()
33 if (UART(UTCR3) & UTCR3_TXE) break; in putc()
38 while (!(UART(UTSR1) & UTSR1_TNF)) in putc()
42 UART(UTDR) = c; in putc()
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| /openbmc/u-boot/board/congatec/conga-qeval20-qa3-e3845/ |
| H A D | README | 2 U-Boot console UART selection:
6 configurations (defconfig files). The only difference is the UART that
7 is used as the U-Boot console UART. The default defconfig file:
13 board (conga-QEVAL). This UART is the one provided with a SubD9
18 provides the U-Boot console on the BayTrail internal legacy UART,
21 RS232 level shifters. So a TTL-USB UART adapter does not work in
23 RS232 level signals of the PC UART via some adapter cable.
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| /openbmc/u-boot/arch/arm/ |
| H A D | Kconfig.debug | 16 bool "Low-level debugging via 8250 UART"
19 their output to an 8250 UART. You can use this option
20 to provide the parameters for the 8250 UART rather than
41 hex "Physical base address of debug UART"
51 int "Register offset shift for the 8250 debug UART"
56 bool "Use 32-bit accesses for 8250 UART"
61 bool "Enable flow control for 8250 UART"
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| /openbmc/qemu/hw/arm/ |
| H A D | Kconfig | 23 select PL011 if !HAVE_RUST # UART
24 select X_PL011_RUST if HAVE_RUST # UART
77 select PL011 if !HAVE_RUST # UART
78 select X_PL011_RUST if HAVE_RUST # UART
91 select PL011 if !HAVE_RUST # UART
92 select X_PL011_RUST if HAVE_RUST # UART
110 select PL011 if !HAVE_RUST # UART
111 select X_PL011_RUST if HAVE_RUST # UART
175 select PL011 if !HAVE_RUST # UART
176 select X_PL011_RUST if HAVE_RUST # UART
[all …]
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| /openbmc/linux/arch/arm/ |
| H A D | Kconfig.debug | 123 UART definition, as specified below. Attempting to boot the kernel
140 bool "Kernel low-level debugging via asm9260 UART"
144 their output to an UART or USART port on asm9260 based
234 bool "Kernel low-level debugging on BCM2835 PL011 UART"
239 bool "Kernel low-level debugging on BCM2836 PL011 UART"
262 bool "Kernel low-level debugging messages via BCM KONA UART"
273 bool "Kernel low-level debugging on BCM63XX UART"
277 bool "Marvell Berlin SoC Debug UART"
285 bool "Use BRCMSTB UART for low-level debug"
290 UART physical and virtual address is automatically provided
[all …]
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| /openbmc/linux/arch/arm/include/debug/ |
| H A D | tegra.S | 85 cmp \rv, #2 @ 2 and 3 mean DCC, UART
89 11: lsr \rv, \rp, #15 @ 17:15 are UART ID
91 cmp \rv, #0 @ UART 0?
93 cmp \rv, #1 @ UART 1?
95 cmp \rv, #2 @ UART 2?
97 cmp \rv, #3 @ UART 3?
99 cmp \rv, #4 @ UART 4?
141 cmp \rp, #0 @ Valid UART address?
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| /openbmc/linux/Documentation/ABI/testing/ |
| H A D | sysfs-platform-kim | 6 Name of the UART device at which the WL128x chip
21 UART configurations, so the baud-rate needs to be set
32 entry most often should be 1, the host's UART is required
42 use of the shared UART transport, it registers to the shared
46 daemon managing the UART, and is notified about the change
47 by the sysfs_notify. The value would be '1' when UART needs
48 to be opened/ldisc installed, and would be '0' when UART
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| H A D | sysfs-bus-i2c-devices-fsa9480 | 10 UART UART is attached
23 UART switch to UART path
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| /openbmc/qemu/docs/system/arm/ |
| H A D | mps2.rst | 70 Note that for the AN536 the first UART is accessible only by
71 CPU0, and the second UART is accessible only by CPU1. The
72 first UART accessible shared between both CPUs is the third
73 UART. Guest software might therefore be built to use either
74 the first UART or the third UART; if you don't see any output
75 from the UART you are looking at, try one of the others.
77 no "CPU1-only UART", the UART numbering remains the same,
78 with the third UART being the first of the shared ones.)
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| /openbmc/phosphor-dbus-interfaces/gen/xyz/openbmc_project/Console/ |
| H A D | meson.build | 3 subdir('UART') subdir
33 input: ['../../../../yaml/xyz/openbmc_project/Console/UART.interface.yaml'],
34 output: ['UART.md'],
46 'xyz/openbmc_project/Console/UART',
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| /openbmc/linux/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe/ |
| H A D | ucc.txt | 15 - port-number : for UART drivers, the port number to use, between 0 and 3.
18 CPM UART driver, the port-number is required for the QE UART driver.
19 - soft-uart : for UART drivers, if specified this means the QE UART device
20 driver should use "Soft-UART" mode, which is needed on some SOCs that have
21 broken UART hardware. Soft-UART is provided via a microcode upload.
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| /openbmc/linux/Documentation/devicetree/bindings/net/ |
| H A D | qca,qca7000.txt | 4 be configured either as SPI or UART slave. This configuration is done by
58 (b) Ethernet over UART
60 In order to use the QCA7000 as UART slave it must be defined as a child of a
61 UART master in the device tree. It is possible to preconfigure the UART
73 UART Example:
75 /* Freescale i.MX28 UART */
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| H A D | mediatek-bluetooth.txt | 37 MediaTek UART based Bluetooth Devices
40 This device is a serial attached device to UART device and thus it must be a
41 child node of the serial node with UART.
58 - pinctrl-0: Should contain UART RXD low when the device is powered up to
60 - pinctrl-1: Should contain UART mode pin ctrl
66 - boot-gpios: GPIO same to the pin as UART RXD and used to keep LOW when
69 - pinctrl-0: Should contain UART mode pin ctrl
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| /openbmc/u-boot/board/solidrun/clearfog/ |
| H A D | README | 29 - UART: 01001 [1]
31 [1]: According to SolidRun's manual, 11110 should be used for UART booting on
36 Boot from UART:
42 Set the SW1 DIP switches to UART boot (see above).
48 Use the correct UART device node for /dev/ttyUSBX.
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| /openbmc/linux/drivers/tty/serial/ |
| H A D | Kconfig | 26 This selects the ARM(R) AMBA(R) PrimeCell PL010 UART. If you have
37 Say Y here if you wish to use an AMBA PrimeCell UART as the system
53 This selects the ARM(R) AMBA(R) PrimeCell PL011 UART. If you have
65 Say Y here if you wish to use an AMBA PrimeCell UART as the system
145 Say Y here if you wish to use an on-chip UART on a Atmel
180 Say Y if you have an external 8250/16C550 UART. If unsure, say N.
215 Say Y here if you wish to use a Amlogic MesonX UART as the
256 Select the number of available UART ports for the Samsung S3C
287 tristate "NVIDIA Tegra Combined UART"
292 Support for the mailbox-based TCU (Tegra Combined UART) serial port.
[all …]
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| /openbmc/linux/drivers/bluetooth/ |
| H A D | Kconfig | 105 tristate "HCI UART driver"
110 Bluetooth HCI UART driver.
113 UART based Bluetooth PCMCIA and CF devices like Xircom Credit Card
116 Say Y here to compile support for Bluetooth UART devices into the
125 bool "UART (H4) protocol support"
128 UART (H4) is serial protocol for communication between Bluetooth
130 with UART interface, including PCMCIA and CF cards.
132 Say Y here to compile support for HCI UART (H4) protocol.
135 tristate "UART Nokia H4+ protocol support"
145 with UART interface in Nokia devices.
[all …]
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| /openbmc/u-boot/board/kobol/helios4/ |
| H A D | README | 29 - UART: 11110
31 Boot from UART:
37 Set the SW1 DIP switches to UART boot (see above).
43 Use the correct UART device node for /dev/ttyUSBX.
|