Searched refs:TRCCNTRLDVRn (Results 1 – 4 of 4) sorted by relevance
| /openbmc/linux/drivers/hwtracing/coresight/ |
| H A D | coresight-cfg-afdo.c | 51 .offset = TRCCNTRLDVRn(0),
69 .offset = TRCCNTRLDVRn(1),
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| H A D | coresight-etm4x-cfg.c | 117 } else if ((offset >= TRCCNTRLDVRn(0)) && in etm4_cfg_map_reg_offset()
123 CHECKREGIDX(TRCCNTRLDVRn(0), cntrldvr, idx, off_mask); in etm4_cfg_map_reg_offset()
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| H A D | coresight-etm4x.h | 52 #define TRCCNTRLDVRn(n) (0x140 + (n * 4)) /* n = 0-3 */ macro
296 CASE_##op((val), TRCCNTRLDVRn(0)) \
297 CASE_##op((val), TRCCNTRLDVRn(1)) \
298 CASE_##op((val), TRCCNTRLDVRn(2)) \
299 CASE_##op((val), TRCCNTRLDVRn(3)) \
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| H A D | coresight-etm4x-core.c | 463 etm4x_relaxed_write32(csa, config->cntrldvr[i], TRCCNTRLDVRn(i)); in etm4_enable_hw()
1718 state->trccntrldvr[i] = etm4x_read32(csa, TRCCNTRLDVRn(i)); in __etm4_cpu_save()
1850 etm4x_relaxed_write32(csa, state->trccntrldvr[i], TRCCNTRLDVRn(i)); in __etm4_cpu_restore()
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