Searched refs:TRCCIDCCTLR1 (Results 1 – 3 of 3) sorted by relevance
72 CHECKREG(TRCCIDCCTLR1, ctxid_mask1); in etm4_cfg_map_reg_offset()
94 #define TRCCIDCCTLR1 0x684 macro434 CASE_##op((val), TRCCIDCCTLR1) \
492 etm4x_relaxed_write32(csa, config->ctxid_mask1, TRCCIDCCTLR1); in etm4_enable_hw()1754 state->trccidcctlr1 = etm4x_read32(csa, TRCCIDCCTLR1); in __etm4_cpu_save()1879 etm4x_relaxed_write32(csa, state->trccidcctlr1, TRCCIDCCTLR1); in __etm4_cpu_restore()