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Searched refs:TPM_CRB_ADDR_BASE (Results 1 – 5 of 5) sorted by relevance

/openbmc/qemu/tests/qtest/
H A Dtpm-crb-test.c27 uint32_t intfid = readl(TPM_CRB_ADDR_BASE + A_CRB_INTF_ID); in tpm_crb_test()
28 uint32_t csize = readl(TPM_CRB_ADDR_BASE + A_CRB_CTRL_CMD_SIZE); in tpm_crb_test()
29 uint64_t caddr = readq(TPM_CRB_ADDR_BASE + A_CRB_CTRL_CMD_LADDR); in tpm_crb_test()
30 uint32_t rsize = readl(TPM_CRB_ADDR_BASE + A_CRB_CTRL_RSP_SIZE); in tpm_crb_test()
31 uint64_t raddr = readq(TPM_CRB_ADDR_BASE + A_CRB_CTRL_RSP_ADDR); in tpm_crb_test()
32 uint8_t locstate = readb(TPM_CRB_ADDR_BASE + A_CRB_LOC_STATE); in tpm_crb_test()
33 uint32_t locctrl = readl(TPM_CRB_ADDR_BASE + A_CRB_LOC_CTRL); in tpm_crb_test()
34 uint32_t locsts = readl(TPM_CRB_ADDR_BASE + A_CRB_LOC_STS); in tpm_crb_test()
35 uint32_t sts = readl(TPM_CRB_ADDR_BASE + A_CRB_CTRL_STS); in tpm_crb_test()
50 g_assert_cmpint(caddr, >, TPM_CRB_ADDR_BASE); in tpm_crb_test()
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H A Dtpm-util.c27 uint64_t caddr = qtest_readq(s, TPM_CRB_ADDR_BASE + A_CRB_CTRL_CMD_LADDR); in tpm_util_crb_transfer()
28 uint64_t raddr = qtest_readq(s, TPM_CRB_ADDR_BASE + A_CRB_CTRL_RSP_ADDR); in tpm_util_crb_transfer()
30 qtest_writeb(s, TPM_CRB_ADDR_BASE + A_CRB_LOC_CTRL, 1); in tpm_util_crb_transfer()
36 qtest_writel(s, TPM_CRB_ADDR_BASE + A_CRB_CTRL_START, start); in tpm_util_crb_transfer()
38 start = qtest_readl(s, TPM_CRB_ADDR_BASE + A_CRB_CTRL_START); in tpm_util_crb_transfer()
46 start = qtest_readl(s, TPM_CRB_ADDR_BASE + A_CRB_CTRL_START); in tpm_util_crb_transfer()
48 sts = qtest_readl(s, TPM_CRB_ADDR_BASE + A_CRB_CTRL_STS); in tpm_util_crb_transfer()
/openbmc/qemu/hw/tpm/
H A Dtpm_crb.c272 s->regs[R_CRB_CTRL_CMD_LADDR] = TPM_CRB_ADDR_BASE + A_CRB_DATA_BUFFER; in tpm_crb_reset()
274 s->regs[R_CRB_CTRL_RSP_ADDR] = TPM_CRB_ADDR_BASE + A_CRB_DATA_BUFFER; in tpm_crb_reset()
303 TPM_CRB_ADDR_BASE, &s->mmio); in tpm_crb_realize()
305 TPM_CRB_ADDR_BASE + sizeof(s->regs), &s->cmdmem); in tpm_crb_realize()
/openbmc/qemu/include/hw/acpi/
H A Dtpm.h180 #define TPM_CRB_ADDR_BASE 0xFED40000 macro
182 #define TPM_CRB_ADDR_CTRL (TPM_CRB_ADDR_BASE + A_CRB_CTRL_REQ)
/openbmc/qemu/hw/i386/
H A Dacpi-build.c1718 aml_append(crs, aml_memory32_fixed(TPM_CRB_ADDR_BASE, in build_dsdt()