Searched refs:TIM_CR1_CEN (Results 1 – 7 of 7) sorted by relevance
/openbmc/linux/drivers/counter/ |
H A D | stm32-timer-cnt.c | 125 regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, 0); in stm32_count_function_write() 133 regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, cr1); in stm32_count_function_write() 188 *enable = cr1 & TIM_CR1_CEN; in stm32_count_enable_read() 202 if (!(cr1 & TIM_CR1_CEN)) { in stm32_count_enable_write() 210 regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, in stm32_count_enable_write() 211 TIM_CR1_CEN); in stm32_count_enable_write() 214 regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, 0); in stm32_count_enable_write() 215 if (cr1 & TIM_CR1_CEN) in stm32_count_enable_write() 375 regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, 0); in stm32_timer_cnt_suspend()
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/openbmc/linux/drivers/iio/trigger/ |
H A D | stm32-timer-trigger.c | 175 regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, TIM_CR1_CEN); in stm32_timer_start() 193 regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, 0); in stm32_timer_stop() 249 if (cr1 & TIM_CR1_CEN) { in stm32_tt_read_frequency() 460 *val = (dat & TIM_CR1_CEN) ? 1 : 0; in stm32_counter_read_raw() 501 regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, in stm32_counter_write_raw() 502 TIM_CR1_CEN); in stm32_counter_write_raw() 504 regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, in stm32_counter_write_raw() 823 regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, 0); in stm32_timer_trigger_remove() 846 regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, 0); in stm32_timer_trigger_suspend()
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/openbmc/qemu/include/hw/timer/ |
H A D | stm32f2xx_timer.h | 52 #define TIM_CR1_CEN 1 macro
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/openbmc/linux/drivers/pwm/ |
H A D | pwm-stm32.c | 119 regmap_set_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN); in stm32_pwm_raw_capture() 164 regmap_clear_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN); in stm32_pwm_raw_capture() 427 regmap_set_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN); in stm32_pwm_enable() 445 regmap_clear_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN); in stm32_pwm_disable()
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/openbmc/linux/drivers/clocksource/ |
H A D | timer-stm32.c | 34 #define TIM_CR1_CEN BIT(0) macro 114 writel_relaxed(TIM_CR1_UDIS | TIM_CR1_CEN, timer_of_base(to) + TIM_CR1); in stm32_timer_start()
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/openbmc/linux/include/linux/mfd/ |
H A D | stm32-timers.h | 36 #define TIM_CR1_CEN BIT(0) /* Counter Enable */ macro
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/openbmc/qemu/hw/timer/ |
H A D | stm32f2xx_timer.c | 53 if (s->tim_dier & TIM_DIER_UIE && s->tim_cr1 & TIM_CR1_CEN) { in stm32f2xx_timer_interrupt()
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