1be284705SAlistair Francis /* 2be284705SAlistair Francis * STM32F2XX Timer 3be284705SAlistair Francis * 4be284705SAlistair Francis * Copyright (c) 2014 Alistair Francis <alistair@alistair23.me> 5be284705SAlistair Francis * 6be284705SAlistair Francis * Permission is hereby granted, free of charge, to any person obtaining a copy 7be284705SAlistair Francis * of this software and associated documentation files (the "Software"), to deal 8be284705SAlistair Francis * in the Software without restriction, including without limitation the rights 9be284705SAlistair Francis * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10be284705SAlistair Francis * copies of the Software, and to permit persons to whom the Software is 11be284705SAlistair Francis * furnished to do so, subject to the following conditions: 12be284705SAlistair Francis * 13be284705SAlistair Francis * The above copyright notice and this permission notice shall be included in 14be284705SAlistair Francis * all copies or substantial portions of the Software. 15be284705SAlistair Francis * 16be284705SAlistair Francis * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17be284705SAlistair Francis * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18be284705SAlistair Francis * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19be284705SAlistair Francis * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20be284705SAlistair Francis * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21be284705SAlistair Francis * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22be284705SAlistair Francis * THE SOFTWARE. 23be284705SAlistair Francis */ 24be284705SAlistair Francis 25be284705SAlistair Francis #ifndef HW_STM32F2XX_TIMER_H 26be284705SAlistair Francis #define HW_STM32F2XX_TIMER_H 27be284705SAlistair Francis 28be284705SAlistair Francis #include "hw/sysbus.h" 29be284705SAlistair Francis #include "qemu/timer.h" 30db1015e9SEduardo Habkost #include "qom/object.h" 31be284705SAlistair Francis 32be284705SAlistair Francis #define TIM_CR1 0x00 33be284705SAlistair Francis #define TIM_CR2 0x04 34be284705SAlistair Francis #define TIM_SMCR 0x08 35be284705SAlistair Francis #define TIM_DIER 0x0C 36be284705SAlistair Francis #define TIM_SR 0x10 37be284705SAlistair Francis #define TIM_EGR 0x14 38be284705SAlistair Francis #define TIM_CCMR1 0x18 39be284705SAlistair Francis #define TIM_CCMR2 0x1C 40be284705SAlistair Francis #define TIM_CCER 0x20 41be284705SAlistair Francis #define TIM_CNT 0x24 42be284705SAlistair Francis #define TIM_PSC 0x28 43be284705SAlistair Francis #define TIM_ARR 0x2C 44be284705SAlistair Francis #define TIM_CCR1 0x34 45be284705SAlistair Francis #define TIM_CCR2 0x38 46be284705SAlistair Francis #define TIM_CCR3 0x3C 47be284705SAlistair Francis #define TIM_CCR4 0x40 48be284705SAlistair Francis #define TIM_DCR 0x48 49be284705SAlistair Francis #define TIM_DMAR 0x4C 50be284705SAlistair Francis #define TIM_OR 0x50 51be284705SAlistair Francis 52be284705SAlistair Francis #define TIM_CR1_CEN 1 53be284705SAlistair Francis 54be284705SAlistair Francis #define TIM_EGR_UG 1 55be284705SAlistair Francis 56be284705SAlistair Francis #define TIM_CCER_CC2E (1 << 4) 57be284705SAlistair Francis #define TIM_CCMR1_OC2M2 (1 << 14) 58be284705SAlistair Francis #define TIM_CCMR1_OC2M1 (1 << 13) 59be284705SAlistair Francis #define TIM_CCMR1_OC2M0 (1 << 12) 60be284705SAlistair Francis #define TIM_CCMR1_OC2PE (1 << 11) 61be284705SAlistair Francis 62be284705SAlistair Francis #define TIM_DIER_UIE 1 63be284705SAlistair Francis 64be284705SAlistair Francis #define TYPE_STM32F2XX_TIMER "stm32f2xx-timer" 65db1015e9SEduardo Habkost typedef struct STM32F2XXTimerState STM32F2XXTimerState; 66*8110fa1dSEduardo Habkost DECLARE_INSTANCE_CHECKER(STM32F2XXTimerState, STM32F2XXTIMER, 67*8110fa1dSEduardo Habkost TYPE_STM32F2XX_TIMER) 68be284705SAlistair Francis 69db1015e9SEduardo Habkost struct STM32F2XXTimerState { 70be284705SAlistair Francis /* <private> */ 71be284705SAlistair Francis SysBusDevice parent_obj; 72be284705SAlistair Francis 73be284705SAlistair Francis /* <public> */ 74be284705SAlistair Francis MemoryRegion iomem; 75be284705SAlistair Francis QEMUTimer *timer; 76be284705SAlistair Francis qemu_irq irq; 77be284705SAlistair Francis 78be284705SAlistair Francis int64_t tick_offset; 79be284705SAlistair Francis uint64_t hit_time; 80be284705SAlistair Francis uint64_t freq_hz; 81be284705SAlistair Francis 82be284705SAlistair Francis uint32_t tim_cr1; 83be284705SAlistair Francis uint32_t tim_cr2; 84be284705SAlistair Francis uint32_t tim_smcr; 85be284705SAlistair Francis uint32_t tim_dier; 86be284705SAlistair Francis uint32_t tim_sr; 87be284705SAlistair Francis uint32_t tim_egr; 88be284705SAlistair Francis uint32_t tim_ccmr1; 89be284705SAlistair Francis uint32_t tim_ccmr2; 90be284705SAlistair Francis uint32_t tim_ccer; 91be284705SAlistair Francis uint32_t tim_psc; 92be284705SAlistair Francis uint32_t tim_arr; 93be284705SAlistair Francis uint32_t tim_ccr1; 94be284705SAlistair Francis uint32_t tim_ccr2; 95be284705SAlistair Francis uint32_t tim_ccr3; 96be284705SAlistair Francis uint32_t tim_ccr4; 97be284705SAlistair Francis uint32_t tim_dcr; 98be284705SAlistair Francis uint32_t tim_dmar; 99be284705SAlistair Francis uint32_t tim_or; 100db1015e9SEduardo Habkost }; 101be284705SAlistair Francis 102be284705SAlistair Francis #endif /* HW_STM32F2XX_TIMER_H */ 103