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Searched refs:TIM_CR1 (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/drivers/counter/
H A Dstm32-timer-cnt.c123 regmap_read(priv->regmap, TIM_CR1, &cr1); in stm32_count_function_write()
125 regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, 0); in stm32_count_function_write()
133 regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, cr1); in stm32_count_function_write()
145 regmap_read(priv->regmap, TIM_CR1, &cr1); in stm32_count_direction_read()
174 regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE, 0); in stm32_count_ceiling_write()
186 regmap_read(priv->regmap, TIM_CR1, &cr1); in stm32_count_enable_read()
201 regmap_read(priv->regmap, TIM_CR1, &cr1); in stm32_count_enable_write()
210 regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, in stm32_count_enable_write()
213 regmap_read(priv->regmap, TIM_CR1, &cr1); in stm32_count_enable_write()
214 regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, 0); in stm32_count_enable_write()
[all …]
/openbmc/linux/drivers/iio/trigger/
H A Dstm32-timer-trigger.c161 regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE, TIM_CR1_ARPE); in stm32_timer_start()
175 regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, TIM_CR1_CEN); in stm32_timer_start()
192 regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE, 0); in stm32_timer_stop()
193 regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, 0); in stm32_timer_stop()
245 regmap_read(priv->regmap, TIM_CR1, &cr1); in stm32_tt_read_frequency()
459 regmap_read(priv->regmap, TIM_CR1, &dat); in stm32_counter_read_raw()
501 regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, in stm32_counter_write_raw()
504 regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, in stm32_counter_write_raw()
686 regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE, 0); in stm32_count_set_preset()
823 regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, 0); in stm32_timer_trigger_remove()
[all …]
/openbmc/linux/drivers/pwm/
H A Dpwm-stm32.c119 regmap_set_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN); in stm32_pwm_raw_capture()
164 regmap_clear_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN); in stm32_pwm_raw_capture()
369 regmap_set_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE); in stm32_pwm_config()
427 regmap_set_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN); in stm32_pwm_enable()
445 regmap_clear_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN); in stm32_pwm_disable()
/openbmc/qemu/include/hw/timer/
H A Dstm32f2xx_timer.h32 #define TIM_CR1 0x00 macro
/openbmc/linux/drivers/clocksource/
H A Dtimer-stm32.c25 #define TIM_CR1 0x00 macro
114 writel_relaxed(TIM_CR1_UDIS | TIM_CR1_CEN, timer_of_base(to) + TIM_CR1); in stm32_timer_start()
/openbmc/qemu/hw/timer/
H A Dstm32f2xx_timer.c132 case TIM_CR1: in stm32f2xx_timer_read()
190 case TIM_CR1: in stm32f2xx_timer_write()
/openbmc/linux/include/linux/mfd/
H A Dstm32-timers.h15 #define TIM_CR1 0x00 /* Control Register 1 */ macro