Home
last modified time | relevance | path

Searched refs:TCG_TARGET_HAS_muls2_i64 (Results 1 – 14 of 14) sorted by relevance

/openbmc/qemu/tcg/tci/
H A Dtcg-target.h105 #define TCG_TARGET_HAS_muls2_i64 1 macro
/openbmc/qemu/tcg/sparc64/
H A Dtcg-target.h146 #define TCG_TARGET_HAS_muls2_i64 0 macro
/openbmc/qemu/tcg/mips/
H A Dtcg-target.h148 #define TCG_TARGET_HAS_muls2_i64 (!use_mips32r6_instructions) macro
/openbmc/qemu/tcg/loongarch64/
H A Dtcg-target.h166 #define TCG_TARGET_HAS_muls2_i64 0 macro
/openbmc/qemu/tcg/aarch64/
H A Dtcg-target.h130 #define TCG_TARGET_HAS_muls2_i64 0 macro
/openbmc/qemu/tcg/ppc/
H A Dtcg-target.h138 #define TCG_TARGET_HAS_muls2_i64 0 macro
/openbmc/qemu/tcg/s390x/
H A Dtcg-target.h135 #define TCG_TARGET_HAS_muls2_i64 HAVE_FACILITY(MISC_INSN_EXT2) macro
/openbmc/qemu/tcg/riscv/
H A Dtcg-target.h137 #define TCG_TARGET_HAS_muls2_i64 0 macro
/openbmc/qemu/tcg/i386/
H A Dtcg-target.h190 #define TCG_TARGET_HAS_muls2_i64 1 macro
/openbmc/qemu/include/tcg/
H A Dtcg-opc.h187 DEF(muls2_i64, 2, 2, 0, IMPL64 | IMPL(TCG_TARGET_HAS_muls2_i64))
H A Dtcg.h100 #define TCG_TARGET_HAS_muls2_i64 0 macro
/openbmc/qemu/tcg/
H A Dtci.c814 #if TCG_TARGET_HAS_muls2_i64 in tcg_qemu_tb_exec()
H A Dtcg-op.c3071 if (TCG_TARGET_HAS_muls2_i64) { in tcg_gen_muls2_i64()
H A Dtcg.c2161 return TCG_TARGET_HAS_muls2_i64; in tcg_op_supported()