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Searched refs:TCG_TARGET_HAS_ext8u_i64 (Results 1 – 15 of 15) sorted by relevance

/openbmc/qemu/tcg/tci/
H A Dtcg-target.h91 #define TCG_TARGET_HAS_ext8u_i64 1 macro
H A Dtcg-target.c.inc568 tcg_debug_assert(TCG_TARGET_HAS_ext8u_i64);
/openbmc/qemu/tcg/sparc64/
H A Dtcg-target.h123 #define TCG_TARGET_HAS_ext8u_i64 0 macro
/openbmc/qemu/tcg/mips/
H A Dtcg-target.h191 #define TCG_TARGET_HAS_ext8u_i64 0 /* andi rt, rs, 0xff */ macro
/openbmc/qemu/tcg/loongarch64/
H A Dtcg-target.h148 #define TCG_TARGET_HAS_ext8u_i64 1 macro
/openbmc/qemu/tcg/aarch64/
H A Dtcg-target.h106 #define TCG_TARGET_HAS_ext8u_i64 1 macro
/openbmc/qemu/tcg/ppc/
H A Dtcg-target.h115 #define TCG_TARGET_HAS_ext8u_i64 0 macro
/openbmc/qemu/tcg/s390x/
H A Dtcg-target.h112 #define TCG_TARGET_HAS_ext8u_i64 1 macro
/openbmc/qemu/tcg/riscv/
H A Dtcg-target.h119 #define TCG_TARGET_HAS_ext8u_i64 1 macro
/openbmc/qemu/tcg/i386/
H A Dtcg-target.h167 #define TCG_TARGET_HAS_ext8u_i64 1 macro
/openbmc/qemu/include/tcg/
H A Dtcg-opc.h167 DEF(ext8u_i64, 1, 1, 0, IMPL64 | IMPL(TCG_TARGET_HAS_ext8u_i64))
H A Dtcg.h77 #define TCG_TARGET_HAS_ext8u_i64 0 macro
/openbmc/qemu/tcg/
H A Dtcg-op.c1789 if (TCG_TARGET_HAS_ext8u_i64) { in tcg_gen_andi_i64()
2153 } else if (TCG_TARGET_HAS_ext8u_i64) { in tcg_gen_ext8u_i64()
2730 if (TCG_TARGET_HAS_ext8u_i64) { in tcg_gen_deposit_z_i64()
2754 if (TCG_TARGET_HAS_ext8u_i64) { in tcg_gen_deposit_z_i64()
2824 if (TCG_TARGET_HAS_ext8u_i64) { in tcg_gen_extract_i64()
H A Dtci.c719 #if TCG_TARGET_HAS_ext8u_i32 || TCG_TARGET_HAS_ext8u_i64 in tcg_qemu_tb_exec()
H A Dtcg.c2125 return TCG_TARGET_HAS_ext8u_i64; in tcg_op_supported()