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Searched refs:TCG_TARGET_HAS_bswap16_i64 (Results 1 – 15 of 15) sorted by relevance

/openbmc/qemu/tcg/tci/
H A Dtcg-target.h79 #define TCG_TARGET_HAS_bswap16_i64 1 macro
H A Dtcg-target.c.inc807 case INDEX_op_bswap16_i64: /* Optional (TCG_TARGET_HAS_bswap16_i64). */
/openbmc/qemu/tcg/sparc64/
H A Dtcg-target.h126 #define TCG_TARGET_HAS_bswap16_i64 0 macro
/openbmc/qemu/tcg/mips/
H A Dtcg-target.h171 #define TCG_TARGET_HAS_bswap16_i64 use_mips32r2_instructions macro
/openbmc/qemu/tcg/loongarch64/
H A Dtcg-target.h151 #define TCG_TARGET_HAS_bswap16_i64 1 macro
/openbmc/qemu/tcg/aarch64/
H A Dtcg-target.h109 #define TCG_TARGET_HAS_bswap16_i64 1 macro
/openbmc/qemu/tcg/ppc/
H A Dtcg-target.h118 #define TCG_TARGET_HAS_bswap16_i64 1 macro
/openbmc/qemu/tcg/s390x/
H A Dtcg-target.h115 #define TCG_TARGET_HAS_bswap16_i64 1 macro
/openbmc/qemu/tcg/riscv/
H A Dtcg-target.h122 #define TCG_TARGET_HAS_bswap16_i64 (cpuinfo & CPUINFO_ZBB) macro
/openbmc/qemu/tcg/i386/
H A Dtcg-target.h170 #define TCG_TARGET_HAS_bswap16_i64 1 macro
/openbmc/qemu/include/tcg/
H A Dtcg-opc.h170 DEF(bswap16_i64, 1, 1, 1, IMPL64 | IMPL(TCG_TARGET_HAS_bswap16_i64))
H A Dtcg.h80 #define TCG_TARGET_HAS_bswap16_i64 0 macro
/openbmc/qemu/tcg/
H A Dtci.c713 TCG_TARGET_HAS_bswap16_i32 || TCG_TARGET_HAS_bswap16_i64 in tcg_qemu_tb_exec()
731 #if TCG_TARGET_HAS_bswap16_i32 || TCG_TARGET_HAS_bswap16_i64 in tcg_qemu_tb_exec()
H A Dtcg-op.c2204 } else if (TCG_TARGET_HAS_bswap16_i64) { in tcg_gen_bswap16_i64()
H A Dtcg.c2131 return TCG_TARGET_HAS_bswap16_i64; in tcg_op_supported()