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Searched refs:TCG_REG_CALL_STACK (Results 1 – 17 of 17) sorted by relevance

/openbmc/qemu/tcg/tci/
H A Dtcg-target.h146 TCG_REG_CALL_STACK = TCG_REG_R15, enumerator
H A Dtcg-target.c.inc249 if (base == TCG_REG_CALL_STACK) {
947 tcg_regset_set_reg(s->reserved_regs, TCG_REG_CALL_STACK);
950 tcg_set_frame(s, TCG_REG_CALL_STACK, TCG_STATIC_CALL_ARGS_SIZE,
/openbmc/qemu/tcg/arm/
H A Dtcg-target.h72 TCG_REG_CALL_STACK = TCG_REG_R13, enumerator
H A Dtcg-target.c.inc2320 tcg_regset_set_reg(s->reserved_regs, TCG_REG_CALL_STACK);
2964 tcg_out_ldstm(s, COND_AL, INSN_STMDB, TCG_REG_CALL_STACK,
2970 tcg_out_dat_rI(s, COND_AL, ARITH_SUB, TCG_REG_CALL_STACK,
2971 TCG_REG_CALL_STACK, STACK_ADDEND, 1);
2972 tcg_set_frame(s, TCG_REG_CALL_STACK, TCG_STATIC_CALL_ARGS_SIZE,
2996 tcg_out_dat_rI(s, COND_AL, ARITH_ADD, TCG_REG_CALL_STACK,
2997 TCG_REG_CALL_STACK, STACK_ADDEND, 1);
3000 tcg_out_ldstm(s, COND_AL, INSN_LDMIA, TCG_REG_CALL_STACK,
/openbmc/qemu/tcg/sparc64/
H A Dtcg-target.h68 #define TCG_REG_CALL_STACK TCG_REG_O6 macro
/openbmc/qemu/tcg/mips/
H A Dtcg-target.h69 TCG_REG_CALL_STACK = TCG_REG_SP, enumerator
/openbmc/qemu/tcg/loongarch64/
H A Dtcg-target.h91 #define TCG_REG_CALL_STACK TCG_REG_SP macro
/openbmc/qemu/tcg/aarch64/
H A Dtcg-target.h53 #define TCG_REG_CALL_STACK TCG_REG_SP macro
/openbmc/qemu/tcg/ppc/
H A Dtcg-target.h54 TCG_REG_CALL_STACK = TCG_REG_R1, enumerator
H A Dtcg-target.c.inc2839 tcg_set_frame(s, TCG_REG_CALL_STACK, REG_SAVE_BOT - CPU_TEMP_BUF_SIZE,
/openbmc/qemu/tcg/s390x/
H A Dtcg-target.h49 TCG_REG_CALL_STACK = TCG_REG_R15 enumerator
H A Dtcg-target.c.inc3549 tcg_regset_set_reg(s->reserved_regs, TCG_REG_CALL_STACK);
3564 tcg_set_frame(s, TCG_REG_CALL_STACK,
3629 12, TCG_REG_CALL_STACK, /* DW_CFA_def_cfa %r15, ... */
/openbmc/qemu/tcg/riscv/
H A Dtcg-target.h63 #define TCG_REG_CALL_STACK TCG_REG_SP macro
/openbmc/qemu/tcg/i386/
H A Dtcg-target.h90 TCG_REG_CALL_STACK = TCG_REG_ESP enumerator
H A Dtcg-target.c.inc4353 tcg_set_frame(s, TCG_REG_CALL_STACK, TCG_STATIC_CALL_ARGS_SIZE,
4401 tcg_out_addi(s, TCG_REG_CALL_STACK, stack_addend);
4452 tcg_regset_set_reg(s->reserved_regs, TCG_REG_CALL_STACK);
/openbmc/qemu/tcg/
H A Dtcg.c5324 tcg_out_st(s, ts->type, ts->reg, TCG_REG_CALL_STACK, in load_arg_stk()
5354 tcg_out_st(s, TCG_TYPE_PTR, reg, TCG_REG_CALL_STACK, in load_arg_ref()
5384 load_arg_ref(s, loc->arg_slot, TCG_REG_CALL_STACK, in tcg_reg_alloc_call()
5620 tcg_out_st(s, dst_type, src, TCG_REG_CALL_STACK, in tcg_out_helper_load_slots()
5685 if (!tcg_out_sti(s, type, imm, TCG_REG_CALL_STACK, ofs)) { in tcg_out_helper_load_imm()
5688 tcg_out_st(s, type, parm->tmp[0], TCG_REG_CALL_STACK, ofs); in tcg_out_helper_load_imm()
5881 TCG_REG_CALL_STACK, ofs_slot0); in tcg_out_ld_helper_args()
5885 TCG_REG_CALL_STACK, ofs_slot0); in tcg_out_ld_helper_args()
5887 TCG_REG_CALL_STACK, ofs_slot0); in tcg_out_ld_helper_args()
5950 TCG_REG_CALL_STACK, ofs_slot0); in tcg_out_ld_helper_ret()
[all …]
H A Dtci.c369 regs[TCG_REG_CALL_STACK] = (uintptr_t)stack; in tcg_qemu_tb_exec()
1036 QEMU_BUILD_BUG_ON(TCG_REG_CALL_STACK != TCG_REG_R15); in str_r()