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Searched refs:TARGET_DEV2G5 (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/net/ethernet/microchip/sparx5/
H A Dsparx5_main.c58 { TARGET_DEV2G5, 0x10004000, 1 }, /* 0x610004000 */
61 { TARGET_DEV2G5 + 1, 0x10010000, 1 }, /* 0x610010000 */
64 { TARGET_DEV2G5 + 2, 0x1001c000, 1 }, /* 0x61001c000 */
67 { TARGET_DEV2G5 + 6, 0x10028000, 1 }, /* 0x610028000 */
70 { TARGET_DEV2G5 + 7, 0x10034000, 1 }, /* 0x610034000 */
73 { TARGET_DEV2G5 + 8, 0x10040000, 1 }, /* 0x610040000 */
76 { TARGET_DEV2G5 + 9, 0x1004c000, 1 }, /* 0x61004c000 */
79 { TARGET_DEV2G5 + 10, 0x10058000, 1 }, /* 0x610058000 */
82 { TARGET_DEV2G5 + 11, 0x10064000, 1 }, /* 0x610064000 */
85 { TARGET_DEV2G5 + 12, 0x10070000, 1 }, /* 0x610070000 */
[all …]
H A Dsparx5_main_regs.h31 TARGET_DEV2G5 = 37, enumerator
2745 #define DEV2G5_DEV_RST_CTRL(t) __REG(TARGET_DEV2G5,\
2797 #define DEV2G5_MAC_ENA_CFG(t) __REG(TARGET_DEV2G5,\
2813 #define DEV2G5_MAC_MODE_CFG(t) __REG(TARGET_DEV2G5,\
2835 #define DEV2G5_MAC_MAXLEN_CFG(t) __REG(TARGET_DEV2G5,\
2845 #define DEV2G5_MAC_TAGS_CFG(t) __REG(TARGET_DEV2G5,\
2873 #define DEV2G5_MAC_TAGS_CFG2(t) __REG(TARGET_DEV2G5,\
2889 #define DEV2G5_MAC_ADV_CHK_CFG(t) __REG(TARGET_DEV2G5,\
2899 #define DEV2G5_MAC_IFG_CFG(t) __REG(TARGET_DEV2G5,\
2927 #define DEV2G5_MAC_HDX_CFG(t) __REG(TARGET_DEV2G5,\
[all …]
H A Dsparx5_port.c321 sparx5_to_high_dev(port->portno) : TARGET_DEV2G5; in sparx5_port_disable()