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Searched refs:S_PM_ENABLE (Results 1 – 3 of 3) sorted by relevance

/openbmc/qemu/target/riscv/
H A Dcpu_bits.h814 #define S_PM_ENABLE (PM_ENABLE << S_OFFSET) macro
826 #define MMTE_S_PM_ENABLE S_PM_ENABLE
842 #define SMTE_S_PM_ENABLE S_PM_ENABLE
H A Dcpu_helper.c243 if (env->mmte & S_PM_ENABLE) { in riscv_cpu_update_mask()
H A Dcsr.c4519 if ((cpu_address_mode(env) == PRV_S) && (env->mmte & S_PM_ENABLE)) { in write_spmmask()
4605 if ((cpu_address_mode(env) == PRV_S) && (env->mmte & S_PM_ENABLE)) { in write_spmbase()