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Searched refs:SRAM_BASE (Results 1 – 15 of 15) sorted by relevance

/openbmc/u-boot/include/configs/
H A Diot_devkit.h49 #define SRAM_BASE 0x30000000 macro
62 #define CONFIG_SYS_LOAD_ADDR SRAM_BASE
/openbmc/qemu/tests/tcg/arm/system/
H A Dtest-armv6m-undef.S30 #define SRAM_BASE 0x20000000 macro
41 .word SRAM_BASE + SRAM_SIZE /* 0. SP_main */
/openbmc/u-boot/drivers/ddr/marvell/a38x/
H A Dxor.h9 #define SRAM_BASE 0x40000000 macro
/openbmc/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_sdram.c508 if (src < SRAM_BASE) { in ddr3_dram_sram_burst()
542 if (dst > SRAM_BASE) { in ddr3_dram_sram_burst()
H A Dxor.c44 base = (SRAM_BASE & 0xFFFF0000) | 0x1E00; in mv_sys_xor_init()
H A Dddr3_hw_training.h93 #define SRAM_BASE 0x40000000 macro
/openbmc/linux/drivers/scsi/aic7xxx/
H A Daic79xx_pci.c467 ahd_outl(ahd, SRAM_BASE, 0x5aa555aa); in ahd_pci_test_register_access()
468 if (ahd_inl(ahd, SRAM_BASE) != 0x5aa555aa) in ahd_pci_test_register_access()
H A Daic7xxx_reg.h_shipped124 ahc_print_register(NULL, 0, "SRAM_BASE", 0x70, regvalue, cur_col, wrap)
586 #define SRAM_BASE 0x70
H A Daic7xxx_reg_print.c_shipped279 return (ahc_print_register(NULL, 0, "SRAM_BASE",
H A Daic7xxx_pci.c1341 *sc_data = ahc_inb(ahc, SRAM_BASE + j) in check_extport()
1342 | ahc_inb(ahc, SRAM_BASE + j + 1) << 8; in check_extport()
H A Daic79xx_reg_print.c_shipped616 return (ahd_print_register(NULL, 0, "SRAM_BASE",
H A Daic79xx_reg.h_shipped285 ahd_print_register(NULL, 0, "SRAM_BASE", 0x100, regvalue, cur_col, wrap)
1533 #define SRAM_BASE 0x100
/openbmc/linux/drivers/staging/rts5208/
H A Drtsx_card.h969 #define SRAM_BASE 0xE600 macro
/openbmc/linux/include/linux/
H A Drtsx_pci.h685 #define SRAM_BASE 0xE600 macro
/openbmc/linux/drivers/net/wireless/atmel/
H A Datmel.c4263 .set SRAM_BASE, 0x02000000
4295 .set MAC_ADDRESS_MIB, SRAM_BASE