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Searched refs:R_DMA_CTRL (Results 1 – 1 of 1) sorted by relevance

/openbmc/qemu/hw/ssi/
H A Daspeed_smc.c141 #define R_DMA_CTRL (0x80 / 4) macro
821 (aspeed_smc_has_dma(asc) && addr == R_DMA_CTRL) || in aspeed_smc_read()
871 (s->regs[R_DMA_CTRL] >> DMA_CTRL_DELAY_SHIFT) & DMA_CTRL_DELAY_MASK; in aspeed_smc_dma_calibration()
873 (s->regs[R_DMA_CTRL] >> DMA_CTRL_FREQ_SHIFT) & DMA_CTRL_FREQ_MASK; in aspeed_smc_dma_calibration()
908 (s->regs[R_DMA_CTRL] >> DMA_CTRL_DELAY_SHIFT) & DMA_CTRL_DELAY_MASK; in aspeed_smc_inject_read_failure()
910 (s->regs[R_DMA_CTRL] >> DMA_CTRL_FREQ_SHIFT) & DMA_CTRL_FREQ_MASK; in aspeed_smc_inject_read_failure()
952 if (s->regs[R_DMA_CTRL] & DMA_CTRL_WRITE) { in aspeed_smc_dma_checksum()
957 if (s->regs[R_DMA_CTRL] & DMA_CTRL_CALIB) { in aspeed_smc_dma_checksum()
1007 trace_aspeed_smc_dma_rw(s->regs[R_DMA_CTRL] & DMA_CTRL_WRITE ? in aspeed_smc_dma_rw()
1013 if (s->regs[R_DMA_CTRL] & DMA_CTRL_WRITE) { in aspeed_smc_dma_rw()
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