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Searched refs:RXENABLE (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/drivers/serial/
H A Dserial_sti_asc.c17 #define RXENABLE 0x00000100 macro
183 val = RXENABLE | RUN | MODE_8BIT | STOP_1BIT | PARITYODD; in sti_asc_serial_probe()
/openbmc/u-boot/drivers/net/
H A Dcalxedaxgmac.c24 #define RXENABLE 0x00000004 macro
416 value |= RXENABLE | TXENABLE; in xgmac_init()
487 value &= ~(RXENABLE | TXENABLE); in xgmac_halt()
H A Ddesignware.h46 #define RXENABLE (1 << 2) macro
H A Ddesignware.c269 writel(readl(&mac_p->conf) & ~(RXENABLE | TXENABLE), &mac_p->conf); in _dw_eth_halt()
350 writel(readl(&mac_p->conf) | RXENABLE | TXENABLE, &mac_p->conf); in designware_eth_enable()