Home
last modified time | relevance | path

Searched refs:RXD (Results 1 – 25 of 25) sorted by relevance

/openbmc/linux/arch/arm/boot/dts/st/
H A Dste-dbx5x0-pinctrl.dtsi17 pins = "GPIO0_AJ5", "GPIO2_AH4"; /* CTS+RXD */
28 pins = "GPIO0_AJ5", "GPIO2_AH4"; /* CTS+RXD */
49 pins = "GPIO4_AH6"; /* RXD */
60 pins = "GPIO4_AH6"; /* RXD */
103 pins = "GPIO29_W2"; /* RXD */
114 pins = "GPIO29_W2"; /* RXD */
548 "GPIO15_AC3", /* RXD */
591 pins = "GPIO196_AG26"; /* RXD */
H A Dste-href-family-pinctrl.dtsi23 pins = "GPIO218_AH11"; /* RXD */
41 pins = "GPIO218_AH11"; /* RXD */
58 "GPIO218_AH11"; /* RXD */
H A Dste-hrefprev60.dtsi80 pins = "GPIO145_C13"; /* RXD */
H A Dste-hrefv60plus.dtsi369 /* Normally UART1 RXD, now dangling */
H A Dste-snowball.dts569 pins = "GPIO145_C13"; /* RXD */
/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dmediatek-bluetooth.txt58 - pinctrl-0: Should contain UART RXD low when the device is powered up to
66 - boot-gpios: GPIO same to the pin as UART RXD and used to keep LOW when
/openbmc/linux/arch/arm64/boot/dts/renesas/
H A Drzg2ul-smarc-pinfunction.dtsi119 <RZG2L_PORT_PINMUX(3, 3, 2)>; /* RXD */
H A Drzg2lc-smarc-pinfunction.dtsi129 <RZG2L_PORT_PINMUX(45, 3, 1)>; /* RXD */
H A Drzg2l-smarc-pinfunction.dtsi143 <RZG2L_PORT_PINMUX(45, 3, 1)>; /* RXD */
/openbmc/linux/arch/arm/boot/dts/microchip/
H A Dsama5d4.dtsi1359 <AT91_PIOE 29 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* RXD */
1368 <AT91_PIOC 25 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* RXD */
1377 <AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* RXD */
1392 <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* RXD */
1407 <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* RXD - conflicts with G0_CRS, ISI_HSYNC */
1422 <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* RXD */
1431 <AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* RXD */
H A Dlan966x-kontron-kswitch-d10-mmt.dtsi98 /* RXD, TXD */
H A Dlan966x-pcb8309.dts136 /* RXD, TXD */
H A Dat91-tse850-3.dts325 /* 28 */ "RXD", "TXD", "BRX", "BTX";
/openbmc/linux/drivers/mailbox/
H A Dbcm-pdc-mailbox.c71 #define RXD(x, max_mask) XXD((x), (max_mask)) macro
74 #define NEXTRXD(i, max_mask) RXD((i) + 1, (max_mask))
75 #define PREVRXD(i, max_mask) RXD((i) - 1, (max_mask))
77 #define NRXDACTIVE(h, t, max_mask) RXD((t) - (h), (max_mask))
/openbmc/linux/drivers/mtd/nand/raw/
H A Dmxic_nand.c64 #define RXD 0x24 macro
374 data = readl(nfc->regs + RXD); in mxic_nfc_data_xfer()
/openbmc/u-boot/arch/arm/dts/
H A Dsama5d4.dtsi1820 <AT91_PIOE 29 AT91_PERIPH_B AT91_PINCTRL_NONE /* RXD */
1829 <AT91_PIOC 25 AT91_PERIPH_C AT91_PINCTRL_NONE /* RXD */
1838 <AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* RXD */
1853 <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* RXD */
1868 <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* RXD - conflicts with G0_CRS, ISI_HSYNC */
1885 <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* RXD */
1894 <AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* RXD */
/openbmc/linux/arch/arm/boot/dts/renesas/
H A Dr7s9210-rza2mevb.dts14 * - RXD = CN17-9,
/openbmc/linux/drivers/spi/
H A Dspi-mxic.c65 #define RXD 0x24 macro
377 data = readl(mxic->regs + RXD); in mxic_spi_data_xfer()
/openbmc/u-boot/board/freescale/mx6memcal/
H A DKconfig60 UART1_TXD/RXD for a console on UART1 as is done
/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3326-odroid-go.dtsi539 /* EXT Header(P2): 2(RXD:GPIO1.C0),3(TXD:.C1),4(CTS:.C2),5(RTS:.C3) */
/openbmc/u-boot/doc/device-tree-bindings/pinctrl/
H A Dpinctrl-bindings.txt203 pins = "GPIO0_AJ5", "GPIO2_AH4"; /* CTS+RXD */
/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dimx8x-colibri.dtsi451 /* Colibri optional CAN on UART_A TXD/RXD */
/openbmc/linux/Documentation/networking/dsa/
H A Dsja1105.rst341 In the RMII spec, the PHY can transmit extra out-of-band signals via RXD[1:0].
/openbmc/linux/Documentation/networking/
H A Dphy.rst90 for the receive data lines (RXD[3:0]) processed by the PHY device
/openbmc/linux/Documentation/driver-api/
H A Dpin-control.rst437 (these are four pins: CLK, RXD, TXD, FRM). In that case, pin B5 can be used as