Searched refs:RSTMGR_DEFINE (Results 1 – 4 of 4) sorted by relevance
/openbmc/u-boot/arch/arm/mach-socfpga/include/mach/ |
H A D | reset_manager_s10.h | 60 #define RSTMGR_DEFINE(_bank, _offset) \ macro 78 #define RSTMGR_EMAC0 RSTMGR_DEFINE(1, 0) 79 #define RSTMGR_EMAC1 RSTMGR_DEFINE(1, 1) 80 #define RSTMGR_EMAC2 RSTMGR_DEFINE(1, 2) 81 #define RSTMGR_USB0 RSTMGR_DEFINE(1, 3) 82 #define RSTMGR_USB1 RSTMGR_DEFINE(1, 4) 83 #define RSTMGR_NAND RSTMGR_DEFINE(1, 5) 84 #define RSTMGR_SDMMC RSTMGR_DEFINE(1, 7) 85 #define RSTMGR_EMAC0_OCP RSTMGR_DEFINE(1, 8) 86 #define RSTMGR_EMAC1_OCP RSTMGR_DEFINE(1, 9) [all …]
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H A D | reset_manager_gen5.h | 36 #define RSTMGR_EMAC0 RSTMGR_DEFINE(1, 0) 37 #define RSTMGR_EMAC1 RSTMGR_DEFINE(1, 1) 38 #define RSTMGR_NAND RSTMGR_DEFINE(1, 4) 39 #define RSTMGR_QSPI RSTMGR_DEFINE(1, 5) 40 #define RSTMGR_L4WD0 RSTMGR_DEFINE(1, 6) 41 #define RSTMGR_OSC1TIMER0 RSTMGR_DEFINE(1, 8) 42 #define RSTMGR_UART0 RSTMGR_DEFINE(1, 16) 43 #define RSTMGR_SPIM0 RSTMGR_DEFINE(1, 18) 44 #define RSTMGR_SPIM1 RSTMGR_DEFINE(1, 19) 45 #define RSTMGR_SDMMC RSTMGR_DEFINE(1, 22) [all …]
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H A D | reset_manager_arria10.h | 60 #define RSTMGR_EMAC0 RSTMGR_DEFINE(1, 0) 61 #define RSTMGR_EMAC1 RSTMGR_DEFINE(1, 1) 62 #define RSTMGR_EMAC2 RSTMGR_DEFINE(1, 2) 63 #define RSTMGR_NAND RSTMGR_DEFINE(1, 5) 64 #define RSTMGR_QSPI RSTMGR_DEFINE(1, 6) 65 #define RSTMGR_SDMMC RSTMGR_DEFINE(1, 7) 66 #define RSTMGR_DMA RSTMGR_DEFINE(1, 16) 67 #define RSTMGR_SPIM0 RSTMGR_DEFINE(1, 17) 68 #define RSTMGR_SPIM1 RSTMGR_DEFINE(1, 18) 69 #define RSTMGR_L4WD0 RSTMGR_DEFINE(2, 0) [all …]
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H A D | reset_manager.h | 25 #define RSTMGR_DEFINE(_bank, _offset) \ macro
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