Home
last modified time | relevance | path

Searched refs:RS (Results 1 – 25 of 88) sorted by relevance

1234

/openbmc/linux/arch/mips/mm/
H A Duasm-mips.c51 [insn_addiu] = {M(addiu_op, 0, 0, 0, 0, 0), RS | RT | SIMM},
52 [insn_addu] = {M(spec_op, 0, 0, 0, 0, addu_op), RS | RT | RD},
53 [insn_and] = {M(spec_op, 0, 0, 0, 0, and_op), RS | RT | RD},
54 [insn_andi] = {M(andi_op, 0, 0, 0, 0, 0), RS | RT | UIMM},
55 [insn_bbit0] = {M(lwc2_op, 0, 0, 0, 0, 0), RS | RT | BIMM},
56 [insn_bbit1] = {M(swc2_op, 0, 0, 0, 0, 0), RS | RT | BIMM},
57 [insn_beq] = {M(beq_op, 0, 0, 0, 0, 0), RS | RT | BIMM},
58 [insn_beql] = {M(beql_op, 0, 0, 0, 0, 0), RS | RT | BIMM},
59 [insn_bgez] = {M(bcond_op, 0, bgez_op, 0, 0, 0), RS | BIMM},
60 [insn_bgezl] = {M(bcond_op, 0, bgezl_op, 0, 0, 0), RS | BIMM},
[all …]
H A Duasm-micromips.c43 [insn_addu] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_addu32_op), RT | RS | RD},
44 [insn_addiu] = {M(mm_addiu32_op, 0, 0, 0, 0, 0), RT | RS | SIMM},
45 [insn_and] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_and_op), RT | RS | RD},
46 [insn_andi] = {M(mm_andi32_op, 0, 0, 0, 0, 0), RT | RS | UIMM},
47 [insn_beq] = {M(mm_beq32_op, 0, 0, 0, 0, 0), RS | RT | BIMM},
49 [insn_bgez] = {M(mm_pool32i_op, mm_bgez_op, 0, 0, 0, 0), RS | BIMM},
51 [insn_bltz] = {M(mm_pool32i_op, mm_bltz_op, 0, 0, 0, 0), RS | BIMM},
53 [insn_bne] = {M(mm_bne32_op, 0, 0, 0, 0, 0), RT | RS | BIMM},
54 [insn_cache] = {M(mm_pool32b_op, 0, 0, mm_cache_func, 0, 0), RT | RS | SIMM},
55 [insn_cfc1] = {M(mm_pool32f_op, 0, 0, 0, mm_cfc1_op, mm_32f_73_op), RT | RS},
[all …]
/openbmc/linux/arch/powerpc/xmon/
H A Dppc-opc.c565 #define RS RC + 1 macro
566 #define RT RS
568 #define RD RS
573 #define RSQ RS + 1
3260 {"evaddw", VX (4, 512), VX_MASK, PPCSPE, 0, {RS, RA, RB}},
3263 {"evaddiw", VX (4, 514), VX_MASK, PPCSPE, 0, {RS, RB, UIMM}},
3265 {"evsubfw", VX (4, 516), VX_MASK, PPCSPE, 0, {RS, RA, RB}},
3266 {"evsubw", VX (4, 516), VX_MASK, PPCSPE, 0, {RS, RB, RA}},
3268 {"evsubifw", VX (4, 518), VX_MASK, PPCSPE, 0, {RS, UIMM, RB}},
3269 {"evsubiw", VX (4, 518), VX_MASK, PPCSPE, 0, {RS, RB, UIMM}},
[all …]
/openbmc/linux/drivers/macintosh/
H A Dvia-macii.c40 #define RS 0x200 /* skip between registers */ macro
42 #define A RS /* A-side data */
43 #define DIRB (2*RS) /* B-side direction (1=output) */
44 #define DIRA (3*RS) /* A-side direction (1=output) */
45 #define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
46 #define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
47 #define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
48 #define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
49 #define T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */
50 #define T2CH (9*RS) /* Timer 2 counter (high 8 bits) */
[all …]
H A Dvia-cuda.c39 #define RS 0x200 /* skip between registers */ macro
41 #define A RS /* A-side data */
42 #define DIRB (2*RS) /* B-side direction (1=output) */
43 #define DIRA (3*RS) /* A-side direction (1=output) */
44 #define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
45 #define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
46 #define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
47 #define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
48 #define T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */
49 #define T2CH (9*RS) /* Timer 2 counter (high 8 bits) */
[all …]
H A Dvia-pmu.c83 #define RS 0x200 /* skip between registers */ macro
85 #define A RS /* A-side data */
86 #define DIRB (2*RS) /* B-side direction (1=output) */
87 #define DIRA (3*RS) /* A-side direction (1=output) */
88 #define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
89 #define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
90 #define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
91 #define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
92 #define T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */
93 #define T2CH (9*RS) /* Timer 2 counter (high 8 bits) */
[all …]
/openbmc/linux/arch/powerpc/platforms/powermac/
H A Dtime.c52 #define RS 0x200 /* skip between registers */ macro
53 #define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
54 #define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
55 #define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
56 #define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
57 #define ACR (11*RS) /* Auxiliary control register */
58 #define IFR (13*RS) /* Interrupt flag register */
/openbmc/linux/Documentation/ABI/testing/
H A Dsysfs-bus-iio-adc-max96116 common input voltage pin (RS+). In Ohms.
13 between RS+ and RS- voltage sense inputs. In Ohms.
17 current flowing between RS+ and RS- inputs.
/openbmc/u-boot/arch/arm/dts/
H A Dkirkwood-openrd.dtsi60 * SelRS232or485 selects between RS-232 or RS-485
63 * Low: RS-232
64 * High: RS-485
/openbmc/linux/arch/arm/boot/dts/marvell/
H A Dkirkwood-openrd.dtsi60 * SelRS232or485 selects between RS-232 or RS-485
63 * Low: RS-232
64 * High: RS-485
/openbmc/linux/tools/testing/selftests/powerpc/primitives/asm/
H A Dasm-compat.h23 #define PPC_MTOCRF(FXM, RS) MTOCRF((FXM), RS) argument
/openbmc/linux/arch/powerpc/include/asm/
H A Dasm-compat.h23 #define PPC_MTOCRF(FXM, RS) MTOCRF((FXM), RS) argument
/openbmc/linux/drivers/edac/
H A Dpnd2_edac.c733 #define RS (0x80) /* rank */ macro
762 R(10), C(7), C(8), C(9), R(11), RS, R(12), R(13), R(14),
772 R(10), C(7), C(8), C(9), R(11), RS, R(12), R(13), R(14),
782 R(10), C(7), C(8), C(9), R(11), RS, R(12), R(13), R(14),
792 R(10), C(7), C(8), C(9), R(11), RS, C(11), R(12), R(13),
802 R(9), R(10), C(8), C(9), R(11), RS, R(12), R(13), R(14),
812 R(9), R(10), C(8), C(9), R(11), RS, R(12), R(13), R(14),
822 R(9), R(10), C(8), C(9), R(11), RS, R(12), R(13), R(14),
832 R(9), R(10), C(8), C(9), R(11), RS, C(11), R(12), R(13),
842 R(8), R(9), R(10), C(9), R(11), RS, R(12), R(13), R(14),
[all …]
/openbmc/linux/drivers/staging/fbtft/
H A Dfb_agm1264k-fl.c30 #define RS gpio.dc macro
192 gpiod_set_value(par->RS, 0); /* RS->0 (command mode) */ in write_reg8_bus8()
354 gpiod_set_value(par->RS, 1); /* RS->1 (data mode) */ in write_vmem()
377 gpiod_set_value(par->RS, 1); /* RS->1 (data mode) */ in write_vmem()
/openbmc/linux/tools/testing/selftests/drivers/net/netdevsim/
H A Dethtool-fec.sh79 $ETHTOOL --set-fec $NSIM_NETDEV encoding auto RS
101 $ETHTOOL --set-fec $NSIM_NETDEV encoding RS 2>/dev/null
/openbmc/openbmc/meta-yadro/meta-nicole/recipes-phosphor/ipmi/phosphor-ipmi-config/
H A Dphosphor-ipmi-config-set-device-id.sh3 BMCPOS=$(awk -v RS=" " '/^bmcposition=/{print substr($0,13)}' /proc/cmdline)
/openbmc/linux/certs/
H A Dcheck-blacklist-hashes.awk14 RS = ","
/openbmc/linux/Documentation/userspace-api/media/dvb/
H A Dfrontend-property-terrestrial-systems.rst238 - :ref:`DTV_ATSCMH_RS_FRAME_MODE <DTV-ATSCMH-RS-FRAME-MODE>`
240 - :ref:`DTV_ATSCMH_RS_FRAME_ENSEMBLE <DTV-ATSCMH-RS-FRAME-ENSEMBLE>`
242 - :ref:`DTV_ATSCMH_RS_CODE_MODE_PRI <DTV-ATSCMH-RS-CODE-MODE-PRI>`
244 - :ref:`DTV_ATSCMH_RS_CODE_MODE_SEC <DTV-ATSCMH-RS-CODE-MODE-SEC>`
H A Dfe_property_parameters.rst712 .. _DTV-ATSCMH-RS-FRAME-MODE:
719 Reed Solomon (RS) frame mode.
724 .. _DTV-ATSCMH-RS-FRAME-ENSEMBLE:
731 Reed Solomon(RS) frame ensemble.
736 .. _DTV-ATSCMH-RS-CODE-MODE-PRI:
743 Reed Solomon (RS) code mode (primary).
748 .. _DTV-ATSCMH-RS-CODE-MODE-SEC:
755 Reed Solomon (RS) code mode (secondary).
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-connectivity/wvdial/wvdial/
H A Dtypo_pon.wvdial.1.patch16 .RS
/openbmc/openbmc/meta-openembedded/meta-perl/recipes-perl/libconfig-tiny/
H A Dlibconfig-tiny-perl_2.30.bb16 SRC_URI = "${CPAN_MIRROR}/authors/id/R/RS/RSAVAGE/Config-Tiny-${PV}.tgz"
/openbmc/linux/arch/m68k/fpsp040/
H A Dstan.S236 fmulx %fp0,%fp2 | ...RS(P1+S(P2+SP3))
241 faddx %fp2,%fp0 | ...R+RS(P1+S(P2+SP3))
274 fmulx %fp1,%fp2 | ...RS(P1+S(P2+SP3))
279 faddx %fp2,%fp1 | ...R+RS(P1+S(P2+SP3))
/openbmc/u-boot/arch/arm/cpu/arm1136/
H A Dstart.S78 bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
/openbmc/u-boot/arch/arm/cpu/arm1176/
H A Dstart.S84 bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
/openbmc/u-boot/arch/arm/cpu/arm920t/
H A Dstart.S94 bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)

1234