RISCV_PMU_EVENT_CACHE_DTLB_WRITE_MISS (reference) in projects: openbmc

Searched refs:RISCV_PMU_EVENT_CACHE_DTLB_WRITE_MISS (Results 1 – 3 of 3) sorted by relevance

/openbmc/qemu/target/riscv/
H A D	pmu.c	`410 case RISCV_PMU_EVENT_CACHE_DTLB_WRITE_MISS: in riscv_pmu_update_event_map()`
H A D	cpu.h	`849 RISCV_PMU_EVENT_CACHE_DTLB_WRITE_MISS = 0x1001B, enumerator`
H A D	cpu_helper.c	`1423 pmu_event_type = RISCV_PMU_EVENT_CACHE_DTLB_WRITE_MISS; in pmu_tlb_fill_incr_ctr()`