| /openbmc/linux/include/dt-bindings/phy/ |
| H A D | phy-lan966x-serdes.h | 10 #define RGMII(x) (SERDES6G_MAX + 1 + (x)) macro
11 #define RGMII_MAX RGMII(2)
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| /openbmc/linux/Documentation/devicetree/bindings/net/ |
| H A D | ibm,emac.txt | 5 special McMAL DMA controller, and sometimes an RGMII or ZMII
55 - rgmii-device : 1 cell, required iff connected to an RGMII. phandle
56 of the RGMII device node.
58 - rgmii-channel : 1 cell, required iff connected to an RGMII. Which
59 RGMII channel is used by this EMAC.
195 iv) RGMII node
203 - revision : as provided by the RGMII new version register if
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| H A D | apm-xgene-enet.txt | 8 - "apm,xgene-enet": RGMII based 1G interface
42 - tx-delay: Delay value for RGMII bridge TX clock.
46 - rx-delay: Delay value for RGMII bridge RX clock.
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| H A D | cavium-pip.txt | 40 - rx-delay: Delay value for RGMII receive clock. Optional. Disabled if 0.
43 - tx-delay: Delay value for RGMII transmit clock. Optional. Disabled if 0.
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| /openbmc/u-boot/doc/device-tree-bindings/net/ |
| H A D | ti,dp83867.txt | 5 - ti,rx-internal-delay - RGMII Recieve Clock Delay - see dt-bindings/net/ti-dp83867.h
7 - ti,tx-internal-delay - RGMII Transmit Clock Delay - see dt-bindings/net/ti-dp83867.h
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| /openbmc/u-boot/board/freescale/bsc9131rdb/ |
| H A D | README | 28 . eTSEC 1 supports RGMII/RMII
29 . eTSEC 2 supports RGMII
69 eTSEC1: Connected to RGMII PHY
70 eTSEC2: Connected to RGMII PHY
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| /openbmc/u-boot/doc/ |
| H A D | README.fec_mxc | 12 RGMII selects 1000 Base-tx reduced pin count interface.
33 example if the CPU is connected directly via the RGMII interface to a
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| /openbmc/u-boot/include/configs/ |
| H A D | tqma6_mba6.h | 12 #define CONFIG_FEC_XCV_TYPE RGMII
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| H A D | zc5601.h | 23 #define CONFIG_FEC_XCV_TYPE RGMII
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| H A D | platinum_titanium.h | 18 #define CONFIG_FEC_XCV_TYPE RGMII
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| H A D | aristainetos2b.h | 21 #define CONFIG_FEC_XCV_TYPE RGMII
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| H A D | aristainetos2.h | 21 #define CONFIG_FEC_XCV_TYPE RGMII
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| H A D | secomx6quq7.h | 31 #define CONFIG_FEC_XCV_TYPE RGMII
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| H A D | mx6qarm2.h | 25 #define CONFIG_FEC_XCV_TYPE RGMII
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| H A D | sksimx6.h | 25 #define CONFIG_FEC_XCV_TYPE RGMII
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| H A D | mx6sabre_common.h | 25 #define CONFIG_FEC_XCV_TYPE RGMII
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| H A D | pcm058.h | 36 #define CONFIG_FEC_XCV_TYPE RGMII
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| H A D | udoo.h | 37 #define CONFIG_FEC_XCV_TYPE RGMII
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| H A D | pfla02.h | 33 #define CONFIG_FEC_XCV_TYPE RGMII
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| H A D | mx6sxsabreauto.h | 134 #define CONFIG_FEC_XCV_TYPE RGMII
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| H A D | titanium.h | 42 #define CONFIG_FEC_XCV_TYPE RGMII
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| /openbmc/linux/arch/arm64/boot/dts/freescale/ |
| H A D | fsl-lx2160a-bluebox3-rev-a.dts | 15 /* The RGMII PHYs have a different MDIO address */
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| /openbmc/linux/arch/powerpc/boot/dts/ |
| H A D | kmeter1.dts | 314 /* ESTAR-1 (UCC1, MDIO 0x10, RGMII) */
330 /* ESTAR-2 (UCC2, MDIO 0x11, RGMII) */
457 /* ESTAR-1 (UCC1, MDIO 0x10, RGMII) */
464 /* ESTAR-2 (UCC2, MDIO 0x11, RGMII) */
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| /openbmc/linux/drivers/phy/microchip/ |
| H A D | lan966x_serdes.c | 99 SERDES_MUX_RGMII(RGMII(0), 2, HSIO_HW_CFG_RGMII_0_CFG |
105 SERDES_MUX_RGMII(RGMII(1), 3, HSIO_HW_CFG_RGMII_1_CFG |
111 SERDES_MUX_RGMII(RGMII(0), 5, HSIO_HW_CFG_RGMII_0_CFG |
117 SERDES_MUX_RGMII(RGMII(1), 6, HSIO_HW_CFG_RGMII_1_CFG |
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| /openbmc/u-boot/board/freescale/c29xpcie/ |
| H A D | README | 20 - eTSEC1, RGMII: one 10/100/1000 port
21 - eTSEC2, RGMII: one 10/100/1000 port
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