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Searched refs:REG_CONFIG_ANT_B (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/net/wireless/realtek/rtl8xxxu/
H A Drtl8xxxu_regs.h1039 #define REG_CONFIG_ANT_B 0x0b6c macro
H A Drtl8xxxu_8192e.c1089 REG_FPGA0_XCD_RF_SW_CTRL, REG_CONFIG_ANT_A, REG_CONFIG_ANT_B, in rtl8192eu_phy_iqcalibrate()
H A Drtl8xxxu_8188f.c1101 REG_FPGA0_XCD_RF_SW_CTRL, REG_CONFIG_ANT_A, REG_CONFIG_ANT_B, in rtl8188fu_phy_iqcalibrate()
H A Drtl8xxxu_8723b.c933 REG_FPGA0_XCD_RF_SW_CTRL, REG_CONFIG_ANT_A, REG_CONFIG_ANT_B, in rtl8723bu_phy_iqcalibrate()
H A Drtl8xxxu_8710b.c1294 REG_FPGA0_XCD_RF_SW_CTRL, REG_CONFIG_ANT_A, REG_CONFIG_ANT_B, in rtl8710bu_phy_iqcalibrate()
H A Drtl8xxxu_8188e.c789 REG_FPGA0_XCD_RF_SW_CTRL, REG_CONFIG_ANT_A, REG_CONFIG_ANT_B, in rtl8188eu_phy_iqcalibrate()
H A Drtl8xxxu_8192f.c1283 REG_FPGA0_XCD_RF_SW_CTRL, REG_CONFIG_ANT_A, REG_CONFIG_ANT_B, in rtl8192fu_phy_iqcalibrate()
H A Drtl8xxxu_core.c3217 REG_FPGA0_XCD_RF_SW_CTRL, REG_CONFIG_ANT_A, REG_CONFIG_ANT_B, in rtl8xxxu_phy_iqcalibrate()
3284 rtl8xxxu_write32(priv, REG_CONFIG_ANT_B, 0x00080000); in rtl8xxxu_phy_iqcalibrate()