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Searched refs:R4 (Results 1 – 25 of 60) sorted by relevance

123

/openbmc/qemu/tests/tcg/multiarch/
H A Dsha1.c67 #define R4(v,w,x,y,z,i) z+=(w^x^y)+blk(i)+0xCA62C1D6+rol(v,5);w=rol(w,30); macro
112 R4(a,b,c,d,e,60); R4(e,a,b,c,d,61); R4(d,e,a,b,c,62); R4(c,d,e,a,b,63); in SHA1Transform()
113 R4(b,c,d,e,a,64); R4(a,b,c,d,e,65); R4(e,a,b,c,d,66); R4(d,e,a,b,c,67); in SHA1Transform()
114 R4(c,d,e,a,b,68); R4(b,c,d,e,a,69); R4(a,b,c,d,e,70); R4(e,a,b,c,d,71); in SHA1Transform()
115 R4(d,e,a,b,c,72); R4(c,d,e,a,b,73); R4(b,c,d,e,a,74); R4(a,b,c,d,e,75); in SHA1Transform()
116 R4(e,a,b,c,d,76); R4(d,e,a,b,c,77); R4(c,d,e,a,b,78); R4(b,c,d,e,a,79); in SHA1Transform()
/openbmc/linux/arch/arm/crypto/
H A Dpoly1305-armv4.pl495 my ($R0,$R1,$S1,$R2,$S2,$R3,$S3,$R4,$S4) = map("d$_",(0..9));
541 vdup.32 $R4,r6
558 vmull.u32 $D4,$R4,${R0}[1]
560 vmlal.u32 $D0,$R4,${S1}[1]
567 vmlal.u32 $D1,$R4,${S2}[1]
575 vmlal.u32 $D2,$R4,${S3}[1]
578 vmlal.u32 $D3,$R4,${S4}[1]
582 vmlal.u32 $D4,$R0,${R4}[1]
675 vtrn.32 $R4,$D4#lo
680 vshl.u32 $S4,$R4,#2
[all …]
/openbmc/linux/arch/powerpc/platforms/pseries/
H A DhvCall.S37 std r4,STK_PARAM(R4)(r1); \
49 ld r4,STACK_FRAME_MIN_SIZE+STK_PARAM(R4)(r1); \
138 HCALL_INST_PRECALL(R4)
158 std r4,STK_PARAM(R4)(r1) /* Save ret buffer */
169 ld r12,STK_PARAM(R4)(r1)
196 ld r12,STACK_FRAME_MIN_SIZE+STK_PARAM(R4)(r1)
225 std r4,STK_PARAM(R4)(r1) /* Save ret buffer */
236 ld r12,STK_PARAM(R4)(r1)
258 std r4,STK_PARAM(R4)(r1) /* Save ret buffer */
273 ld r12,STK_PARAM(R4)(r1)
[all …]
/openbmc/linux/arch/powerpc/kernel/
H A Dfpu.S68 REST_32FPVSRS(0, R4, R3)
78 SAVE_32FPVSRS(0, R4, R3)
81 REST_1FPVSR(0, R4, R3)
132 REST_32FPVSRS(0, R4, R10)
150 2: SAVE_32FPVSRS(0, R4, R6)
153 REST_1FPVSR(0, R4, R6)
/openbmc/linux/tools/perf/arch/powerpc/tests/
H A Dregs_load.S9 #define R4 4 * 8 macro
48 std 4, R4(3)
93 ld 4, R4(3)
/openbmc/linux/drivers/edac/
H A Dmce_amd.h32 #define R4(x) (((x) >> 4) & 0xf) macro
33 #define R4_MSG(x) ((R4(x) < 9) ? rrrr_msgs[R4(x)] : "Wrong R4!")
H A Dmce_amd.c642 if (R4(ec) == R4_GEN && LL(ec) == LL_L1) { in f10h_mc0_mce()
661 u8 r4 = R4(ec); in cat_mc0_mce()
796 switch (R4(ec)) { in k8_mc1_mce()
821 u8 r4 = R4(ec); in cat_mc1_mce()
922 u8 r4 = R4(ec); in k8_mc2_mce()
981 u8 r4 = R4(ec); in f16h_mc2_mce()
1045 u8 r4 = R4(ec); in decode_mc3_mce()
/openbmc/openbmc/poky/meta/conf/machine/include/arm/armv7r/
H A Dtune-cortexr4.inc2 # Tune Settings for Cortex-R4
6 TUNEVALID[cortexr4] = "Enable Cortex-R4 specific processor optimizations"
/openbmc/linux/tools/perf/arch/arm/tests/
H A Dregs_load.S8 #define R4 0x20 macro
45 str r4, [r0, #R4]
/openbmc/linux/lib/
H A Dtest_bpf.c43 #define R4 BPF_REG_4 macro
653 i += __bpf_ld_imm64(&insn[i], R4, val); in __bpf_fill_alu_shift()
654 insn[i++] = BPF_JMP_REG(BPF_JEQ, R1, R4, 1); in __bpf_fill_alu_shift()
1622 i += __bpf_ld_imm64(&insns[i], R4, fetch); in __bpf_emit_atomic64()
1632 insns[i++] = BPF_JMP_REG(BPF_JEQ, R2, R4, 1); in __bpf_emit_atomic64()
1669 i += __bpf_ld_imm64(&insns[i], R4, fetch); in __bpf_emit_atomic32()
1679 insns[i++] = BPF_JMP_REG(BPF_JEQ, R2, R4, 1); in __bpf_emit_atomic32()
3782 BPF_ALU64_IMM(BPF_MOV, R4, 4),
3792 BPF_ALU64_IMM(BPF_ADD, R4, 20),
3802 BPF_ALU64_IMM(BPF_SUB, R4, 10),
[all …]
/openbmc/linux/arch/arm64/crypto/
H A Dpoly1305-armv8.pl262 my ($R0,$R1,$S1,$R2,$S2,$R3,$S3,$R4,$S4) = map("v$_.4s",(0..8));
514 ld1 {$S2,$R3,$S3,$R4},[x15],#64
570 umull $ACC4,$IN23_0,${R4}[2]
652 umlal $ACC4,$IN01_0,${R4}[0]
767 umlal2 $ACC4,$IN23_0,${R4}
805 umlal $ACC4,$IN01_0,${R4}
/openbmc/linux/drivers/tty/serial/
H A Dsunzilog.c200 write_zsreg(channel, R4, regs[R4]); in __load_zsregs()
871 up->curregs[R4] &= ~XCLK_MASK; in sunzilog_convert_to_zs()
872 up->curregs[R4] |= X16CLK; in sunzilog_convert_to_zs()
903 up->curregs[R4] &= ~0x0c; in sunzilog_convert_to_zs()
905 up->curregs[R4] |= SB2; in sunzilog_convert_to_zs()
907 up->curregs[R4] |= SB1; in sunzilog_convert_to_zs()
909 up->curregs[R4] |= PAR_ENAB; in sunzilog_convert_to_zs()
911 up->curregs[R4] &= ~PAR_ENAB; in sunzilog_convert_to_zs()
913 up->curregs[R4] |= PAR_EVEN; in sunzilog_convert_to_zs()
915 up->curregs[R4] &= ~PAR_EVEN; in sunzilog_convert_to_zs()
[all …]
H A Dpmac_zilog.c128 write_zsreg(uap, R4, regs[R4]); in pmz_load_zsregs()
823 uap->curregs[R4] = X16CLK | SB1; in __pmz_startup()
965 uap->curregs[R4] = X1CLK; in pmz_convert_to_zs()
974 uap->curregs[R4] = X16CLK; in pmz_convert_to_zs()
979 uap->curregs[R4] = X32CLK; in pmz_convert_to_zs()
984 uap->curregs[R4] = X16CLK; in pmz_convert_to_zs()
H A Dip22zilog.c181 write_zsreg(channel, R4, regs[R4]); in __load_zsregs()
806 up->curregs[R4] &= ~XCLK_MASK; in ip22zilog_convert_to_zs()
807 up->curregs[R4] |= X16CLK; in ip22zilog_convert_to_zs()
1139 up->curregs[R4] = PAR_EVEN | X16CLK | SB1; in ip22zilog_prepare()
H A Dzs.h64 #define R4 4 macro
/openbmc/linux/arch/s390/crypto/
H A Dcrc32le-vx.S65 .quad 0x0ccaa009e, 0x1751997d0 # R4, R3
74 .quad 0x14cd00bd6, 0xf20c0dfe # R4, R3
H A Dcrc32be-vx.S63 .quad 0x0c5b9cd4c, 0x0e8a45605 # R3, R4
/openbmc/linux/tools/perf/arch/arm/util/
H A Dunwind-libdw.c24 dwarf_regs[4] = REG(R4); in libdw__arch_set_initial_registers()
/openbmc/linux/arch/powerpc/lib/
H A Dldstfp.S169 1: LXVD2X(0,R0,R4)
198 STXVD2X(0,R0,R4)
/openbmc/linux/tools/perf/arch/loongarch/util/
H A Dunwind-libdw.c26 dwarf_regs[4] = REG(R4); in libdw__arch_set_initial_registers()
/openbmc/linux/tools/perf/arch/s390/util/
H A Dunwind-libdw.c30 dwarf_regs[4] = REG(R4); in libdw__arch_set_initial_registers()
/openbmc/linux/tools/perf/arch/powerpc/util/
H A Dunwind-libdw.c33 dwarf_regs[4] = REG(R4); in libdw__arch_set_initial_registers()
/openbmc/openbmc/meta-openembedded/meta-gnome/recipes-gimp/gimp/gimp/
H A D0001-libtool-Do-not-add-build-time-library-paths-to-LD_LI.patch31 # The second colon is a workaround for a bug in BeOS R4 sed
/openbmc/linux/drivers/net/hamradio/
H A Dz8530.h11 #define R4 4 macro
/openbmc/linux/arch/arm/boot/dts/renesas/
H A Dr8a7745-iwg22d-sodimm.dts123 * On some older versions of the platform (before R4.0) the phy address
124 * may be 1 or 3. The address is fixed to 3 for R4.0 onwards.

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