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Searched refs:PM_INSN (Results 1 – 1 of 1) sorted by relevance

/openbmc/qemu/target/riscv/
H A Dcpu_bits.h764 #define PM_INSN 0x00000004ULL macro
813 #define U_PM_INSN (PM_INSN << U_OFFSET)
816 #define S_PM_INSN (PM_INSN << S_OFFSET)
819 #define M_PM_INSN (PM_INSN << M_OFFSET)