/openbmc/linux/drivers/pinctrl/renesas/ |
H A D | pfc-sh7264.c | 1489 { PINMUX_CFG_REG("PBCR4", 0xfffe3826, 16, 4, GROUP( 1499 { PINMUX_CFG_REG("PBCR3", 0xfffe3828, 16, 4, GROUP( 1509 { PINMUX_CFG_REG("PBCR2", 0xfffe382a, 16, 4, GROUP( 1519 { PINMUX_CFG_REG("PBCR1", 0xfffe382c, 16, 4, GROUP( 1554 { PINMUX_CFG_REG("PBIOR0", 0xfffe3832, 16, 1, GROUP( 1584 { PINMUX_CFG_REG("PCCR1", 0xfffe384c, 16, 4, GROUP( 1594 { PINMUX_CFG_REG("PCCR0", 0xfffe384e, 16, 4, GROUP( 1623 { PINMUX_CFG_REG("PDCR3", 0xfffe3868, 16, 4, GROUP( 1633 { PINMUX_CFG_REG("PDCR2", 0xfffe386a, 16, 4, GROUP( 1643 { PINMUX_CFG_REG("PDCR1", 0xfffe386c, 16, 4, GROUP( [all …]
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H A D | pfc-sh7203.c | 1092 { PINMUX_CFG_REG("PBCRL3", 0xfffe3892, 16, 4, GROUP( 1105 { PINMUX_CFG_REG("PBCRL2", 0xfffe3894, 16, 4, GROUP( 1118 { PINMUX_CFG_REG("PBCRL1", 0xfffe3896, 16, 4, GROUP( 1138 { PINMUX_CFG_REG("PCIORL", 0xfffe3906, 16, 1, GROUP( 1169 { PINMUX_CFG_REG("PCCRL3", 0xfffe3912, 16, 4, GROUP( 1182 { PINMUX_CFG_REG("PCCRL2", 0xfffe3914, 16, 4, GROUP( 1195 { PINMUX_CFG_REG("PCCRL1", 0xfffe3916, 16, 4, GROUP( 1208 { PINMUX_CFG_REG("PDIORL", 0xfffe3986, 16, 1, GROUP( 1226 { PINMUX_CFG_REG("PDCRL4", 0xfffe3990, 16, 4, GROUP( 1243 { PINMUX_CFG_REG("PDCRL3", 0xfffe3992, 16, 4, GROUP( [all …]
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H A D | pfc-sh7269.c | 1992 { PINMUX_CFG_REG("PBCR4", 0xfffe3826, 16, 4, GROUP( 2009 { PINMUX_CFG_REG("PBCR3", 0xfffe3828, 16, 4, GROUP( 2025 { PINMUX_CFG_REG("PBCR2", 0xfffe382a, 16, 4, GROUP( 2038 { PINMUX_CFG_REG("PBCR1", 0xfffe382c, 16, 4, GROUP( 2078 { PINMUX_CFG_REG("PBIOR0", 0xfffe3832, 16, 1, GROUP( 2105 { PINMUX_CFG_REG("PCCR1", 0xfffe384c, 16, 4, GROUP( 2121 { PINMUX_CFG_REG("PCCR0", 0xfffe384e, 16, 4, GROUP( 2150 { PINMUX_CFG_REG("PDCR3", 0xfffe3868, 16, 4, GROUP( 2163 { PINMUX_CFG_REG("PDCR2", 0xfffe386a, 16, 4, GROUP( 2176 { PINMUX_CFG_REG("PDCR1", 0xfffe386c, 16, 4, GROUP( [all …]
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H A D | pfc-sh7757.c | 1685 { PINMUX_CFG_REG("PACR", 0xffec0000, 16, 2, GROUP( 1695 { PINMUX_CFG_REG("PBCR", 0xffec0002, 16, 2, GROUP( 1705 { PINMUX_CFG_REG("PCCR", 0xffec0004, 16, 2, GROUP( 1715 { PINMUX_CFG_REG("PDCR", 0xffec0006, 16, 2, GROUP( 1725 { PINMUX_CFG_REG("PECR", 0xffec0008, 16, 2, GROUP( 1735 { PINMUX_CFG_REG("PFCR", 0xffec000a, 16, 2, GROUP( 1745 { PINMUX_CFG_REG("PGCR", 0xffec000c, 16, 2, GROUP( 1755 { PINMUX_CFG_REG("PHCR", 0xffec000e, 16, 2, GROUP( 1765 { PINMUX_CFG_REG("PICR", 0xffec0010, 16, 2, GROUP( 1775 { PINMUX_CFG_REG("PJCR", 0xffec0012, 16, 2, GROUP( [all …]
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H A D | pfc-sh7724.c | 1741 { PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2, GROUP( 1751 { PINMUX_CFG_REG("PBCR", 0xa4050102, 16, 2, GROUP( 1761 { PINMUX_CFG_REG("PCCR", 0xa4050104, 16, 2, GROUP( 1771 { PINMUX_CFG_REG("PDCR", 0xa4050106, 16, 2, GROUP( 1781 { PINMUX_CFG_REG("PECR", 0xa4050108, 16, 2, GROUP( 1791 { PINMUX_CFG_REG("PFCR", 0xa405010a, 16, 2, GROUP( 1812 { PINMUX_CFG_REG("PHCR", 0xa405010e, 16, 2, GROUP( 1822 { PINMUX_CFG_REG("PJCR", 0xa4050110, 16, 2, GROUP( 1832 { PINMUX_CFG_REG("PKCR", 0xa4050112, 16, 2, GROUP( 1842 { PINMUX_CFG_REG("PLCR", 0xa4050114, 16, 2, GROUP( [all …]
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H A D | pfc-sh7786.c | 629 { PINMUX_CFG_REG("PACR", 0xffcc0000, 16, 2, GROUP( 639 { PINMUX_CFG_REG("PBCR", 0xffcc0002, 16, 2, GROUP( 649 { PINMUX_CFG_REG("PCCR", 0xffcc0004, 16, 2, GROUP( 659 { PINMUX_CFG_REG("PDCR", 0xffcc0006, 16, 2, GROUP( 676 { PINMUX_CFG_REG("PFCR", 0xffcc000a, 16, 2, GROUP( 694 { PINMUX_CFG_REG("PHCR", 0xffcc000e, 16, 2, GROUP( 704 { PINMUX_CFG_REG("PJCR", 0xffcc0010, 16, 2, GROUP( 714 { PINMUX_CFG_REG("P1MSELR", 0xffcc0080, 16, 1, GROUP( 732 { PINMUX_CFG_REG("P2MSELR", 0xffcc0082, 16, 1, GROUP(
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H A D | pfc-sh7785.c | 987 { PINMUX_CFG_REG("PACR", 0xffe70000, 16, 2, GROUP( 997 { PINMUX_CFG_REG("PBCR", 0xffe70002, 16, 2, GROUP( 1007 { PINMUX_CFG_REG("PCCR", 0xffe70004, 16, 2, GROUP( 1017 { PINMUX_CFG_REG("PDCR", 0xffe70006, 16, 2, GROUP( 1038 { PINMUX_CFG_REG("PFCR", 0xffe7000a, 16, 2, GROUP( 1048 { PINMUX_CFG_REG("PGCR", 0xffe7000c, 16, 2, GROUP( 1058 { PINMUX_CFG_REG("PHCR", 0xffe7000e, 16, 2, GROUP( 1068 { PINMUX_CFG_REG("PJCR", 0xffe70010, 16, 2, GROUP( 1078 { PINMUX_CFG_REG("PKCR", 0xffe70012, 16, 2, GROUP( 1088 { PINMUX_CFG_REG("PLCR", 0xffe70014, 16, 2, GROUP( [all …]
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H A D | pfc-sh7720.c | 927 { PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2, GROUP( 937 { PINMUX_CFG_REG("PBCR", 0xa4050102, 16, 2, GROUP( 947 { PINMUX_CFG_REG("PCCR", 0xa4050104, 16, 2, GROUP( 957 { PINMUX_CFG_REG("PDCR", 0xa4050106, 16, 2, GROUP( 967 { PINMUX_CFG_REG("PECR", 0xa4050108, 16, 2, GROUP( 977 { PINMUX_CFG_REG("PFCR", 0xa405010a, 16, 2, GROUP( 987 { PINMUX_CFG_REG("PGCR", 0xa405010c, 16, 2, GROUP( 997 { PINMUX_CFG_REG("PHCR", 0xa405010e, 16, 2, GROUP( 1007 { PINMUX_CFG_REG("PJCR", 0xa4050110, 16, 2, GROUP( 1036 { PINMUX_CFG_REG("PMCR", 0xa4050116, 16, 2, GROUP( [all …]
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H A D | pfc-sh7723.c | 1509 { PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2, GROUP( 1519 { PINMUX_CFG_REG("PBCR", 0xa4050102, 16, 2, GROUP( 1529 { PINMUX_CFG_REG("PCCR", 0xa4050104, 16, 2, GROUP( 1539 { PINMUX_CFG_REG("PDCR", 0xa4050106, 16, 2, GROUP( 1560 { PINMUX_CFG_REG("PFCR", 0xa405010a, 16, 2, GROUP( 1581 { PINMUX_CFG_REG("PHCR", 0xa405010e, 16, 2, GROUP( 1603 { PINMUX_CFG_REG("PKCR", 0xa4050112, 16, 2, GROUP( 1613 { PINMUX_CFG_REG("PLCR", 0xa4050114, 16, 2, GROUP( 1623 { PINMUX_CFG_REG("PMCR", 0xa4050116, 16, 2, GROUP( 1633 { PINMUX_CFG_REG("PNCR", 0xa4050118, 16, 2, GROUP( [all …]
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H A D | pfc-sh7722.c | 1238 { PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2, GROUP( 1248 { PINMUX_CFG_REG("PBCR", 0xa4050102, 16, 2, GROUP( 1270 { PINMUX_CFG_REG("PDCR", 0xa4050106, 16, 2, GROUP( 1291 { PINMUX_CFG_REG("PFCR", 0xa405010a, 16, 2, GROUP( 1311 { PINMUX_CFG_REG("PHCR", 0xa405010e, 16, 2, GROUP( 1331 { PINMUX_CFG_REG("PKCR", 0xa4050112, 16, 2, GROUP( 1341 { PINMUX_CFG_REG("PLCR", 0xa4050114, 16, 2, GROUP( 1351 { PINMUX_CFG_REG("PMCR", 0xa4050116, 16, 2, GROUP( 1361 { PINMUX_CFG_REG("PNCR", 0xa4050118, 16, 2, GROUP( 1371 { PINMUX_CFG_REG("PQCR", 0xa405011a, 16, 2, GROUP( [all …]
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H A D | pfc-r8a77470.c | 2546 { PINMUX_CFG_REG("GPSR2", 0xE606000C, 32, 1, GROUP( 2607 { PINMUX_CFG_REG("GPSR4", 0xE6060014, 32, 1, GROUP( 2641 { PINMUX_CFG_REG("GPSR5", 0xE6060018, 32, 1, GROUP( 2675 { PINMUX_CFG_REG("IPSR0", 0xE6060040, 32, 4, GROUP( 2701 { PINMUX_CFG_REG("IPSR1", 0xE6060044, 32, 4, GROUP( 2727 { PINMUX_CFG_REG("IPSR2", 0xE6060048, 32, 4, GROUP( 2753 { PINMUX_CFG_REG("IPSR3", 0xE606004C, 32, 4, GROUP( 2780 { PINMUX_CFG_REG("IPSR4", 0xE6060050, 32, 4, GROUP( 2806 { PINMUX_CFG_REG("IPSR5", 0xE6060054, 32, 4, GROUP( 2832 { PINMUX_CFG_REG("IPSR6", 0xE6060058, 32, 4, GROUP( [all …]
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H A D | pfc-shx3.c | 433 { PINMUX_CFG_REG("PABCR", 0xffc70000, 32, 2, GROUP( 451 { PINMUX_CFG_REG("PCDCR", 0xffc70004, 32, 2, GROUP( 469 { PINMUX_CFG_REG("PEFCR", 0xffc70008, 32, 2, GROUP( 487 { PINMUX_CFG_REG("PGHCR", 0xffc7000c, 32, 2, GROUP(
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H A D | pfc-r8a77995.c | 2504 { PINMUX_CFG_REG("GPSR1", 0xe6060104, 32, 1, GROUP( 2538 { PINMUX_CFG_REG("GPSR2", 0xe6060108, 32, 1, GROUP( 2587 { PINMUX_CFG_REG("GPSR4", 0xe6060110, 32, 1, GROUP( 2673 { PINMUX_CFG_REG("IPSR0", 0xe6060200, 32, 4, GROUP( 2683 { PINMUX_CFG_REG("IPSR1", 0xe6060204, 32, 4, GROUP( 2693 { PINMUX_CFG_REG("IPSR2", 0xe6060208, 32, 4, GROUP( 2703 { PINMUX_CFG_REG("IPSR3", 0xe606020c, 32, 4, GROUP( 2713 { PINMUX_CFG_REG("IPSR4", 0xe6060210, 32, 4, GROUP( 2723 { PINMUX_CFG_REG("IPSR5", 0xe6060214, 32, 4, GROUP( 2733 { PINMUX_CFG_REG("IPSR6", 0xe6060218, 32, 4, GROUP( [all …]
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H A D | pfc-r8a77980.c | 2537 { PINMUX_CFG_REG("GPSR1", 0xe6060104, 32, 1, GROUP( 2571 { PINMUX_CFG_REG("GPSR2", 0xe6060108, 32, 1, GROUP( 2686 { PINMUX_CFG_REG("IPSR0", 0xe6060200, 32, 4, GROUP( 2696 { PINMUX_CFG_REG("IPSR1", 0xe6060204, 32, 4, GROUP( 2706 { PINMUX_CFG_REG("IPSR2", 0xe6060208, 32, 4, GROUP( 2716 { PINMUX_CFG_REG("IPSR3", 0xe606020c, 32, 4, GROUP( 2726 { PINMUX_CFG_REG("IPSR4", 0xe6060210, 32, 4, GROUP( 2736 { PINMUX_CFG_REG("IPSR5", 0xe6060214, 32, 4, GROUP( 2746 { PINMUX_CFG_REG("IPSR6", 0xe6060218, 32, 4, GROUP( 2756 { PINMUX_CFG_REG("IPSR7", 0xe606021c, 32, 4, GROUP( [all …]
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H A D | pfc-emev2.c | 1396 { PINMUX_CFG_REG("GPSR0", 0xe0140200, 32, 1, GROUP( 1431 { PINMUX_CFG_REG("GPSR1", 0xe0140204, 32, 1, GROUP( 1466 { PINMUX_CFG_REG("GPSR2", 0xe0140208, 32, 1, GROUP( 1501 { PINMUX_CFG_REG("GPSR3", 0xe014020c, 32, 1, GROUP( 1536 { PINMUX_CFG_REG("GPSR4", 0xe0140210, 32, 1, GROUP(
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H A D | pfc-r8a779g0.c | 3139 { PINMUX_CFG_REG("GPSR1", 0xE6050840, 32, 1, GROUP( 3199 { PINMUX_CFG_REG("GPSR3", 0xE6058840, 32, 1, GROUP( 3233 { PINMUX_CFG_REG("GPSR4", 0xE6060040, 32, 1, GROUP( 3373 { PINMUX_CFG_REG("IP0SR0", 0xE6050060, 32, 4, GROUP( 3383 { PINMUX_CFG_REG("IP1SR0", 0xE6050064, 32, 4, GROUP( 3401 { PINMUX_CFG_REG("IP0SR1", 0xE6050860, 32, 4, GROUP( 3411 { PINMUX_CFG_REG("IP1SR1", 0xE6050864, 32, 4, GROUP( 3421 { PINMUX_CFG_REG("IP2SR1", 0xE6050868, 32, 4, GROUP( 3441 { PINMUX_CFG_REG("IP0SR2", 0xE6058060, 32, 4, GROUP( 3451 { PINMUX_CFG_REG("IP1SR2", 0xE6058064, 32, 4, GROUP( [all …]
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H A D | pfc-r8a77970.c | 2115 { PINMUX_CFG_REG("GPSR1", 0xe6060104, 32, 1, GROUP( 2232 { PINMUX_CFG_REG("IPSR0", 0xe6060200, 32, 4, GROUP( 2242 { PINMUX_CFG_REG("IPSR1", 0xe6060204, 32, 4, GROUP( 2252 { PINMUX_CFG_REG("IPSR2", 0xe6060208, 32, 4, GROUP( 2262 { PINMUX_CFG_REG("IPSR3", 0xe606020c, 32, 4, GROUP( 2272 { PINMUX_CFG_REG("IPSR4", 0xe6060210, 32, 4, GROUP( 2282 { PINMUX_CFG_REG("IPSR5", 0xe6060214, 32, 4, GROUP( 2292 { PINMUX_CFG_REG("IPSR6", 0xe6060218, 32, 4, GROUP( 2302 { PINMUX_CFG_REG("IPSR7", 0xe606021c, 32, 4, GROUP(
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H A D | pfc-r8a77990.c | 4661 { PINMUX_CFG_REG("GPSR2", 0xe6060108, 32, 1, GROUP( 4788 { PINMUX_CFG_REG("IPSR0", 0xe6060200, 32, 4, GROUP( 4798 { PINMUX_CFG_REG("IPSR1", 0xe6060204, 32, 4, GROUP( 4808 { PINMUX_CFG_REG("IPSR2", 0xe6060208, 32, 4, GROUP( 4818 { PINMUX_CFG_REG("IPSR3", 0xe606020c, 32, 4, GROUP( 4828 { PINMUX_CFG_REG("IPSR4", 0xe6060210, 32, 4, GROUP( 4838 { PINMUX_CFG_REG("IPSR5", 0xe6060214, 32, 4, GROUP( 4848 { PINMUX_CFG_REG("IPSR6", 0xe6060218, 32, 4, GROUP( 4858 { PINMUX_CFG_REG("IPSR7", 0xe606021c, 32, 4, GROUP( 4868 { PINMUX_CFG_REG("IPSR8", 0xe6060220, 32, 4, GROUP( [all …]
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/openbmc/u-boot/drivers/pinctrl/renesas/ |
H A D | pfc-r8a77995.c | 2018 { PINMUX_CFG_REG("GPSR0", 0xe6060100, 32, 1) { 2052 { PINMUX_CFG_REG("GPSR1", 0xe6060104, 32, 1) { 2086 { PINMUX_CFG_REG("GPSR2", 0xe6060108, 32, 1) { 2120 { PINMUX_CFG_REG("GPSR3", 0xe606010c, 32, 1) { 2154 { PINMUX_CFG_REG("GPSR4", 0xe6060110, 32, 1) { 2188 { PINMUX_CFG_REG("GPSR5", 0xe6060114, 32, 1) { 2222 { PINMUX_CFG_REG("GPSR6", 0xe6060118, 32, 1) { 2261 { PINMUX_CFG_REG("IPSR0", 0xe6060200, 32, 4) { 2271 { PINMUX_CFG_REG("IPSR1", 0xe6060204, 32, 4) { 2281 { PINMUX_CFG_REG("IPSR2", 0xe6060208, 32, 4) { [all …]
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H A D | pfc-r8a77970.c | 2050 { PINMUX_CFG_REG("GPSR0", 0xe6060100, 32, 1) { 2084 { PINMUX_CFG_REG("GPSR1", 0xe6060104, 32, 1) { 2118 { PINMUX_CFG_REG("GPSR2", 0xe6060108, 32, 1) { 2152 { PINMUX_CFG_REG("GPSR3", 0xe606010c, 32, 1) { 2186 { PINMUX_CFG_REG("GPSR4", 0xe6060110, 32, 1) { 2220 { PINMUX_CFG_REG("GPSR5", 0xe6060114, 32, 1) { 2259 { PINMUX_CFG_REG("IPSR0", 0xe6060200, 32, 4) { 2269 { PINMUX_CFG_REG("IPSR1", 0xe6060204, 32, 4) { 2279 { PINMUX_CFG_REG("IPSR2", 0xe6060208, 32, 4) { 2289 { PINMUX_CFG_REG("IPSR3", 0xe606020c, 32, 4) { [all …]
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H A D | pfc-r8a7792.c | 1993 { PINMUX_CFG_REG("GPSR0", 0xE6060004, 32, 1) { 2027 { PINMUX_CFG_REG("GPSR1", 0xE6060008, 32, 1) { 2061 { PINMUX_CFG_REG("GPSR2", 0xE606000C, 32, 1) { 2095 { PINMUX_CFG_REG("GPSR3", 0xE6060010, 32, 1) { 2129 { PINMUX_CFG_REG("GPSR4", 0xE6060014, 32, 1) { 2163 { PINMUX_CFG_REG("GPSR5", 0xE6060018, 32, 1) { 2197 { PINMUX_CFG_REG("GPSR6", 0xE606001C, 32, 1) { 2231 { PINMUX_CFG_REG("GPSR7", 0xE6060020, 32, 1) { 2265 { PINMUX_CFG_REG("GPSR8", 0xE6060024, 32, 1) { 2299 { PINMUX_CFG_REG("GPSR9", 0xE6060028, 32, 1) { [all …]
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H A D | pfc-r8a77990.c | 4688 { PINMUX_CFG_REG("GPSR0", 0xe6060100, 32, 1) { 4722 { PINMUX_CFG_REG("GPSR1", 0xe6060104, 32, 1) { 4756 { PINMUX_CFG_REG("GPSR2", 0xe6060108, 32, 1) { 4790 { PINMUX_CFG_REG("GPSR3", 0xe606010c, 32, 1) { 4824 { PINMUX_CFG_REG("GPSR4", 0xe6060110, 32, 1) { 4858 { PINMUX_CFG_REG("GPSR5", 0xe6060114, 32, 1) { 4892 { PINMUX_CFG_REG("GPSR6", 0xe6060118, 32, 1) { 4931 { PINMUX_CFG_REG("IPSR0", 0xe6060200, 32, 4) { 4941 { PINMUX_CFG_REG("IPSR1", 0xe6060204, 32, 4) { 4951 { PINMUX_CFG_REG("IPSR2", 0xe6060208, 32, 4) { [all …]
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H A D | pfc-r8a7795.c | 5080 { PINMUX_CFG_REG("GPSR0", 0xe6060100, 32, 1) { 5114 { PINMUX_CFG_REG("GPSR1", 0xe6060104, 32, 1) { 5148 { PINMUX_CFG_REG("GPSR2", 0xe6060108, 32, 1) { 5182 { PINMUX_CFG_REG("GPSR3", 0xe606010c, 32, 1) { 5216 { PINMUX_CFG_REG("GPSR4", 0xe6060110, 32, 1) { 5250 { PINMUX_CFG_REG("GPSR5", 0xe6060114, 32, 1) { 5284 { PINMUX_CFG_REG("GPSR6", 0xe6060118, 32, 1) { 5318 { PINMUX_CFG_REG("GPSR7", 0xe606011c, 32, 1) { 5357 { PINMUX_CFG_REG("IPSR0", 0xe6060200, 32, 4) { 5367 { PINMUX_CFG_REG("IPSR1", 0xe6060204, 32, 4) { [all …]
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H A D | pfc-r8a7796.c | 5037 { PINMUX_CFG_REG("GPSR0", 0xe6060100, 32, 1) { 5071 { PINMUX_CFG_REG("GPSR1", 0xe6060104, 32, 1) { 5105 { PINMUX_CFG_REG("GPSR2", 0xe6060108, 32, 1) { 5139 { PINMUX_CFG_REG("GPSR3", 0xe606010c, 32, 1) { 5173 { PINMUX_CFG_REG("GPSR4", 0xe6060110, 32, 1) { 5207 { PINMUX_CFG_REG("GPSR5", 0xe6060114, 32, 1) { 5241 { PINMUX_CFG_REG("GPSR6", 0xe6060118, 32, 1) { 5275 { PINMUX_CFG_REG("GPSR7", 0xe606011c, 32, 1) { 5314 { PINMUX_CFG_REG("IPSR0", 0xe6060200, 32, 4) { 5324 { PINMUX_CFG_REG("IPSR1", 0xe6060204, 32, 4) { [all …]
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/openbmc/u-boot/include/ |
H A D | sh_pfc.h | 51 #define PINMUX_CFG_REG(name, r, r_width, f_width) \ macro 186 PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) { \
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