1d764c504SNobuhiro Iwamatsu /* 2d764c504SNobuhiro Iwamatsu * SuperH Pin Function Controller Support 3d764c504SNobuhiro Iwamatsu * Copy from Linux kernel. (include/linux/sh_pfc.h) 4d764c504SNobuhiro Iwamatsu * 5*ee8f0cb3SNobuhiro Iwamatsu * Copyright (C) 2015 Renesas Electronics Corporation 6d764c504SNobuhiro Iwamatsu * Copyright (c) 2008 Magnus Damm 7d764c504SNobuhiro Iwamatsu * 8d764c504SNobuhiro Iwamatsu * This file is subject to the terms and conditions of the GNU General Public 9d764c504SNobuhiro Iwamatsu * License. See the file "COPYING" in the main directory of this archive 10d764c504SNobuhiro Iwamatsu * for more details. 11d764c504SNobuhiro Iwamatsu */ 12d764c504SNobuhiro Iwamatsu 13d764c504SNobuhiro Iwamatsu #ifndef __SH_PFC_H 14d764c504SNobuhiro Iwamatsu #define __SH_PFC_H 15d764c504SNobuhiro Iwamatsu 16d764c504SNobuhiro Iwamatsu typedef unsigned short pinmux_enum_t; 17d764c504SNobuhiro Iwamatsu typedef unsigned short pinmux_flag_t; 18d764c504SNobuhiro Iwamatsu 19d764c504SNobuhiro Iwamatsu #define PINMUX_TYPE_NONE 0 20d764c504SNobuhiro Iwamatsu #define PINMUX_TYPE_FUNCTION 1 21d764c504SNobuhiro Iwamatsu #define PINMUX_TYPE_GPIO 2 22d764c504SNobuhiro Iwamatsu #define PINMUX_TYPE_OUTPUT 3 23d764c504SNobuhiro Iwamatsu #define PINMUX_TYPE_INPUT 4 24d764c504SNobuhiro Iwamatsu #define PINMUX_TYPE_INPUT_PULLUP 5 25d764c504SNobuhiro Iwamatsu #define PINMUX_TYPE_INPUT_PULLDOWN 6 26d764c504SNobuhiro Iwamatsu 27d764c504SNobuhiro Iwamatsu #define PINMUX_FLAG_TYPE (0x7) 28d764c504SNobuhiro Iwamatsu #define PINMUX_FLAG_WANT_PULLUP (1 << 3) 29d764c504SNobuhiro Iwamatsu #define PINMUX_FLAG_WANT_PULLDOWN (1 << 4) 30d764c504SNobuhiro Iwamatsu 31d764c504SNobuhiro Iwamatsu #define PINMUX_FLAG_DBIT_SHIFT 5 32d764c504SNobuhiro Iwamatsu #define PINMUX_FLAG_DBIT (0x1f << PINMUX_FLAG_DBIT_SHIFT) 33d764c504SNobuhiro Iwamatsu #define PINMUX_FLAG_DREG_SHIFT 10 34d764c504SNobuhiro Iwamatsu #define PINMUX_FLAG_DREG (0x3f << PINMUX_FLAG_DREG_SHIFT) 35d764c504SNobuhiro Iwamatsu 36d764c504SNobuhiro Iwamatsu struct pinmux_gpio { 37d764c504SNobuhiro Iwamatsu pinmux_enum_t enum_id; 38d764c504SNobuhiro Iwamatsu pinmux_flag_t flags; 39d764c504SNobuhiro Iwamatsu }; 40d764c504SNobuhiro Iwamatsu 41d764c504SNobuhiro Iwamatsu #define PINMUX_GPIO(gpio, data_or_mark)[gpio] = { data_or_mark } 42d764c504SNobuhiro Iwamatsu #define PINMUX_DATA(data_or_mark, ids...) data_or_mark, ids, 0 43d764c504SNobuhiro Iwamatsu 44d764c504SNobuhiro Iwamatsu struct pinmux_cfg_reg { 45d764c504SNobuhiro Iwamatsu unsigned long reg, reg_width, field_width; 46d764c504SNobuhiro Iwamatsu unsigned long *cnt; 47d764c504SNobuhiro Iwamatsu pinmux_enum_t *enum_ids; 48d764c504SNobuhiro Iwamatsu unsigned long *var_field_width; 49d764c504SNobuhiro Iwamatsu }; 50d764c504SNobuhiro Iwamatsu 51d764c504SNobuhiro Iwamatsu #define PINMUX_CFG_REG(name, r, r_width, f_width) \ 52d764c504SNobuhiro Iwamatsu .reg = r, .reg_width = r_width, .field_width = f_width, \ 53d764c504SNobuhiro Iwamatsu .cnt = (unsigned long [r_width / f_width]) {}, \ 54d764c504SNobuhiro Iwamatsu .enum_ids = (pinmux_enum_t [(r_width / f_width) * (1 << f_width)]) 55d764c504SNobuhiro Iwamatsu 56d764c504SNobuhiro Iwamatsu #define PINMUX_CFG_REG_VAR(name, r, r_width, var_fw0, var_fwn...) \ 57d764c504SNobuhiro Iwamatsu .reg = r, .reg_width = r_width, \ 58d764c504SNobuhiro Iwamatsu .cnt = (unsigned long [r_width]) {}, \ 59d764c504SNobuhiro Iwamatsu .var_field_width = (unsigned long [r_width]) { var_fw0, var_fwn, 0 }, \ 60d764c504SNobuhiro Iwamatsu .enum_ids = (pinmux_enum_t []) 61d764c504SNobuhiro Iwamatsu 62d764c504SNobuhiro Iwamatsu struct pinmux_data_reg { 63d764c504SNobuhiro Iwamatsu unsigned long reg, reg_width, reg_shadow; 64d764c504SNobuhiro Iwamatsu pinmux_enum_t *enum_ids; 65d764c504SNobuhiro Iwamatsu void *mapped_reg; 66d764c504SNobuhiro Iwamatsu }; 67d764c504SNobuhiro Iwamatsu 68d764c504SNobuhiro Iwamatsu #define PINMUX_DATA_REG(name, r, r_width) \ 69d764c504SNobuhiro Iwamatsu .reg = r, .reg_width = r_width, \ 70d764c504SNobuhiro Iwamatsu .enum_ids = (pinmux_enum_t [r_width]) \ 71d764c504SNobuhiro Iwamatsu 72d764c504SNobuhiro Iwamatsu struct pinmux_irq { 73d764c504SNobuhiro Iwamatsu int irq; 74d764c504SNobuhiro Iwamatsu pinmux_enum_t *enum_ids; 75d764c504SNobuhiro Iwamatsu }; 76d764c504SNobuhiro Iwamatsu 77d764c504SNobuhiro Iwamatsu #define PINMUX_IRQ(irq_nr, ids...) \ 78d764c504SNobuhiro Iwamatsu { .irq = irq_nr, .enum_ids = (pinmux_enum_t []) { ids, 0 } } \ 79d764c504SNobuhiro Iwamatsu 80d764c504SNobuhiro Iwamatsu struct pinmux_range { 81d764c504SNobuhiro Iwamatsu pinmux_enum_t begin; 82d764c504SNobuhiro Iwamatsu pinmux_enum_t end; 83d764c504SNobuhiro Iwamatsu pinmux_enum_t force; 84d764c504SNobuhiro Iwamatsu }; 85d764c504SNobuhiro Iwamatsu 86d764c504SNobuhiro Iwamatsu struct pinmux_info { 87d764c504SNobuhiro Iwamatsu char *name; 88d764c504SNobuhiro Iwamatsu pinmux_enum_t reserved_id; 89d764c504SNobuhiro Iwamatsu struct pinmux_range data; 90d764c504SNobuhiro Iwamatsu struct pinmux_range input; 91d764c504SNobuhiro Iwamatsu struct pinmux_range input_pd; 92d764c504SNobuhiro Iwamatsu struct pinmux_range input_pu; 93d764c504SNobuhiro Iwamatsu struct pinmux_range output; 94d764c504SNobuhiro Iwamatsu struct pinmux_range mark; 95d764c504SNobuhiro Iwamatsu struct pinmux_range function; 96d764c504SNobuhiro Iwamatsu 97d764c504SNobuhiro Iwamatsu unsigned first_gpio, last_gpio; 98d764c504SNobuhiro Iwamatsu 99d764c504SNobuhiro Iwamatsu struct pinmux_gpio *gpios; 100d764c504SNobuhiro Iwamatsu struct pinmux_cfg_reg *cfg_regs; 101d764c504SNobuhiro Iwamatsu struct pinmux_data_reg *data_regs; 102d764c504SNobuhiro Iwamatsu 103d764c504SNobuhiro Iwamatsu pinmux_enum_t *gpio_data; 104d764c504SNobuhiro Iwamatsu unsigned int gpio_data_size; 105d764c504SNobuhiro Iwamatsu 106d764c504SNobuhiro Iwamatsu struct pinmux_irq *gpio_irq; 107d764c504SNobuhiro Iwamatsu unsigned int gpio_irq_size; 108d764c504SNobuhiro Iwamatsu 109d764c504SNobuhiro Iwamatsu struct resource *resource; 110d764c504SNobuhiro Iwamatsu unsigned int num_resources; 111d764c504SNobuhiro Iwamatsu unsigned long unlock_reg; 112d764c504SNobuhiro Iwamatsu }; 113d764c504SNobuhiro Iwamatsu 114d764c504SNobuhiro Iwamatsu int register_pinmux(struct pinmux_info *pip); 115d764c504SNobuhiro Iwamatsu int unregister_pinmux(struct pinmux_info *pip); 116d764c504SNobuhiro Iwamatsu 117d764c504SNobuhiro Iwamatsu /* helper macro for port */ 118d764c504SNobuhiro Iwamatsu #define PORT_1(fn, pfx, sfx) fn(pfx, sfx) 119d764c504SNobuhiro Iwamatsu 120d764c504SNobuhiro Iwamatsu #define PORT_10(fn, pfx, sfx) \ 121d764c504SNobuhiro Iwamatsu PORT_1(fn, pfx##0, sfx), PORT_1(fn, pfx##1, sfx), \ 122d764c504SNobuhiro Iwamatsu PORT_1(fn, pfx##2, sfx), PORT_1(fn, pfx##3, sfx), \ 123d764c504SNobuhiro Iwamatsu PORT_1(fn, pfx##4, sfx), PORT_1(fn, pfx##5, sfx), \ 124d764c504SNobuhiro Iwamatsu PORT_1(fn, pfx##6, sfx), PORT_1(fn, pfx##7, sfx), \ 125d764c504SNobuhiro Iwamatsu PORT_1(fn, pfx##8, sfx), PORT_1(fn, pfx##9, sfx) 126d764c504SNobuhiro Iwamatsu 127d764c504SNobuhiro Iwamatsu #define PORT_90(fn, pfx, sfx) \ 128d764c504SNobuhiro Iwamatsu PORT_10(fn, pfx##1, sfx), PORT_10(fn, pfx##2, sfx), \ 129d764c504SNobuhiro Iwamatsu PORT_10(fn, pfx##3, sfx), PORT_10(fn, pfx##4, sfx), \ 130d764c504SNobuhiro Iwamatsu PORT_10(fn, pfx##5, sfx), PORT_10(fn, pfx##6, sfx), \ 131d764c504SNobuhiro Iwamatsu PORT_10(fn, pfx##7, sfx), PORT_10(fn, pfx##8, sfx), \ 132d764c504SNobuhiro Iwamatsu PORT_10(fn, pfx##9, sfx) 133d764c504SNobuhiro Iwamatsu 134d764c504SNobuhiro Iwamatsu #define _PORT_ALL(pfx, sfx) pfx##_##sfx 135d764c504SNobuhiro Iwamatsu #define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA) 136d764c504SNobuhiro Iwamatsu #define PORT_ALL(str) CPU_ALL_PORT(_PORT_ALL, PORT, str) 137d764c504SNobuhiro Iwamatsu #define GPIO_PORT_ALL() CPU_ALL_PORT(_GPIO_PORT, , unused) 138d764c504SNobuhiro Iwamatsu #define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK) 139*ee8f0cb3SNobuhiro Iwamatsu #define GPIO_GFN(str) PINMUX_GPIO(GPIO_GFN_##str, str##_GMARK) 140*ee8f0cb3SNobuhiro Iwamatsu #define GPIO_IFN(str) PINMUX_GPIO(GPIO_IFN_##str, str##_IMARK) 141d764c504SNobuhiro Iwamatsu 142d764c504SNobuhiro Iwamatsu /* helper macro for pinmux_enum_t */ 143d764c504SNobuhiro Iwamatsu #define PORT_DATA_I(nr) \ 144d764c504SNobuhiro Iwamatsu PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_IN) 145d764c504SNobuhiro Iwamatsu 146d764c504SNobuhiro Iwamatsu #define PORT_DATA_I_PD(nr) \ 147d764c504SNobuhiro Iwamatsu PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \ 148d764c504SNobuhiro Iwamatsu PORT##nr##_IN, PORT##nr##_IN_PD) 149d764c504SNobuhiro Iwamatsu 150d764c504SNobuhiro Iwamatsu #define PORT_DATA_I_PU(nr) \ 151d764c504SNobuhiro Iwamatsu PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \ 152d764c504SNobuhiro Iwamatsu PORT##nr##_IN, PORT##nr##_IN_PU) 153d764c504SNobuhiro Iwamatsu 154d764c504SNobuhiro Iwamatsu #define PORT_DATA_I_PU_PD(nr) \ 155d764c504SNobuhiro Iwamatsu PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \ 156d764c504SNobuhiro Iwamatsu PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU) 157d764c504SNobuhiro Iwamatsu 158d764c504SNobuhiro Iwamatsu #define PORT_DATA_O(nr) \ 159d764c504SNobuhiro Iwamatsu PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT) 160d764c504SNobuhiro Iwamatsu 161d764c504SNobuhiro Iwamatsu #define PORT_DATA_IO(nr) \ 162d764c504SNobuhiro Iwamatsu PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \ 163d764c504SNobuhiro Iwamatsu PORT##nr##_IN) 164d764c504SNobuhiro Iwamatsu 165d764c504SNobuhiro Iwamatsu #define PORT_DATA_IO_PD(nr) \ 166d764c504SNobuhiro Iwamatsu PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \ 167d764c504SNobuhiro Iwamatsu PORT##nr##_IN, PORT##nr##_IN_PD) 168d764c504SNobuhiro Iwamatsu 169d764c504SNobuhiro Iwamatsu #define PORT_DATA_IO_PU(nr) \ 170d764c504SNobuhiro Iwamatsu PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \ 171d764c504SNobuhiro Iwamatsu PORT##nr##_IN, PORT##nr##_IN_PU) 172d764c504SNobuhiro Iwamatsu 173d764c504SNobuhiro Iwamatsu #define PORT_DATA_IO_PU_PD(nr) \ 174d764c504SNobuhiro Iwamatsu PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \ 175d764c504SNobuhiro Iwamatsu PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU) 176d764c504SNobuhiro Iwamatsu 177d764c504SNobuhiro Iwamatsu /* helper macro for top 4 bits in PORTnCR */ 178d764c504SNobuhiro Iwamatsu #define _PCRH(in, in_pd, in_pu, out) \ 179d764c504SNobuhiro Iwamatsu 0, (out), (in), 0, \ 180d764c504SNobuhiro Iwamatsu 0, 0, 0, 0, \ 181d764c504SNobuhiro Iwamatsu 0, 0, (in_pd), 0, \ 182d764c504SNobuhiro Iwamatsu 0, 0, (in_pu), 0 183d764c504SNobuhiro Iwamatsu 184d764c504SNobuhiro Iwamatsu #define PORTCR(nr, reg) \ 185d764c504SNobuhiro Iwamatsu { \ 186d764c504SNobuhiro Iwamatsu PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) { \ 187d764c504SNobuhiro Iwamatsu _PCRH(PORT##nr##_IN, PORT##nr##_IN_PD, \ 188d764c504SNobuhiro Iwamatsu PORT##nr##_IN_PU, PORT##nr##_OUT), \ 189d764c504SNobuhiro Iwamatsu PORT##nr##_FN0, PORT##nr##_FN1, \ 190d764c504SNobuhiro Iwamatsu PORT##nr##_FN2, PORT##nr##_FN3, \ 191d764c504SNobuhiro Iwamatsu PORT##nr##_FN4, PORT##nr##_FN5, \ 192d764c504SNobuhiro Iwamatsu PORT##nr##_FN6, PORT##nr##_FN7 } \ 193d764c504SNobuhiro Iwamatsu } 194d764c504SNobuhiro Iwamatsu 195d764c504SNobuhiro Iwamatsu #endif /* __SH_PFC_H */ 196