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Searched refs:PHYS_SDRAM (Results 1 – 25 of 128) sorted by relevance

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/openbmc/u-boot/include/configs/
H A Dpm9g45.h68 #define PHYS_SDRAM 0x70000000 macro
101 #define CONFIG_AT91SAM9G45_LCD_BASE PHYS_SDRAM + 0xE00000
103 #define CONFIG_SYS_LOAD_ADDR PHYS_SDRAM + 0x2000000 /* load addr */
105 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
120 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
H A Dzmx25.h75 #define PHYS_SDRAM 0x80000000 /* start address of LPDDRRAM */ macro
78 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
98 #define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM + (512*1024))
99 #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM + PHYS_SDRAM_SIZE)
H A Dmx7ulp_evk.h76 #define PHYS_SDRAM 0x60000000 macro
78 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
79 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
H A Dplatinum.h47 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR macro
52 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
98 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
H A Daristainetos-common.h133 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
138 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR macro
140 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
H A Dsecomx6quq7.h67 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR macro
70 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
H A Dpm9261.h157 #define PHYS_SDRAM 0x20000000 macro
197 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
267 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
H A Dmx6qarm2.h109 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR macro
111 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
H A Dsksimx6.h40 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR macro
42 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
H A Dmx6memcal.h42 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR macro
44 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
H A Dpm9263.h171 #define PHYS_SDRAM 0x20000000 macro
226 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
297 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
H A Dmx6sabre_common.h169 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR macro
171 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
H A Dwarp.h35 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR macro
37 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
H A Dimx6dl-mamoj.h85 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR macro
87 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
H A Dmeesc.h58 #define PHYS_SDRAM ATMEL_BASE_CS1 /* 0x20000000 */ macro
61 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
H A Dmx6sllevk.h116 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR macro
119 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
H A Dpcm058.h62 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR macro
64 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
H A Dusbarmory.h85 #define PHYS_SDRAM CSD0_BASE_ADDR macro
88 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
H A Dmx6slevk.h122 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR macro
124 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
H A Dudoo.h78 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR macro
80 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
H A Dpfla02.h62 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR macro
64 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
H A Dliteboard.h115 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR macro
117 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
H A Dimx6_logic.h124 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR macro
125 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
H A Dmx6sxsabreauto.h98 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR macro
100 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
/openbmc/u-boot/board/ronetix/pm9g45/
H A Dpm9g45.c127 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; in board_init()
142 gd->ram_size = get_ram_size((void *)PHYS_SDRAM, in dram_init()
149 gd->bd->bi_dram[0].start = PHYS_SDRAM; in dram_init_banksize()

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