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Searched refs:PE (Results 1 – 25 of 189) sorted by relevance

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/openbmc/qemu/tests/tcg/i386/
H A Dtest-i386-sse-exceptions.c46 #define PE (1 << 5) macro
47 #define EXC (IE | ZE | OE | UE | PE)
69 if ((mxcsr & EXC) != (UE | PE)) { in main()
77 if ((mxcsr & EXC) != (OE | PE)) { in main()
85 if ((mxcsr & EXC) != PE) { in main()
101 if ((mxcsr & EXC) != PE) { in main()
130 if ((mxcsr & EXC) != PE) { in main()
203 if ((mxcsr & EXC) != (OE | PE)) { in main()
210 if ((mxcsr & EXC) != PE) { in main()
231 if ((mxcsr & EXC) != (UE | PE)) { in main()
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H A Dtest-i386-fp-exceptions.c36 #define PE (1 << 5) macro
37 #define EXC (IE | ZE | OE | UE | PE)
66 if ((sw & EXC) != (UE | PE)) { in main()
73 if ((sw & EXC) != (UE | PE)) { in main()
81 if ((sw & EXC) != (OE | PE)) { in main()
88 if ((sw & EXC) != (OE | PE)) { in main()
96 if ((sw & EXC) != PE) { in main()
103 if ((sw & EXC) != PE) { in main()
141 if ((sw & EXC) != PE) { in main()
192 if ((sw & EXC) != (OE | PE)) { in main()
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/openbmc/linux/drivers/pinctrl/freescale/
H A Dpinctrl-imx27.c23 #define PE 4 macro
150 MX27_PAD_USBOTG_NXT = PAD_ID(PE, 0),
151 MX27_PAD_USBOTG_STP = PAD_ID(PE, 1),
152 MX27_PAD_USBOTG_DIR = PAD_ID(PE, 2),
153 MX27_PAD_UART2_CTS = PAD_ID(PE, 3),
154 MX27_PAD_UART2_RTS = PAD_ID(PE, 4),
155 MX27_PAD_PWMO = PAD_ID(PE, 5),
156 MX27_PAD_UART2_TXD = PAD_ID(PE, 6),
157 MX27_PAD_UART2_RXD = PAD_ID(PE, 7),
158 MX27_PAD_UART3_TXD = PAD_ID(PE, 8),
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/openbmc/linux/Documentation/powerpc/
H A Dpci_iov_resource_on_powernv.rst22 A Partitionable Endpoint (PE) is a way to group the various resources
28 There is thus, in HW, a table of PE states that contains a pair of "frozen"
30 cleared independently) for each PE.
32 When a PE is frozen, all stores in any direction are dropped and all loads
54 correspondence between a PCIe RID (bus/dev/fn) with a PE number.
57 - For DMA we then provide an entire address space for each PE that can
66 bridge being triggered. There's a PE# in the interrupt controller
67 descriptor table as well which is compared with the PE# obtained from
96 maps each segment to a PE#. That allows portions of the MMIO space
103 can be assigned to a PE.
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/openbmc/linux/Documentation/translations/zh_CN/riscv/
H A Dboot-image-header.rst35 u32 res3; /* Reserved for PE COFF offset */
37 这种头格式与PE/COFF文件头兼容,并在很大程度上受到ARM64文件头的启发。因此,ARM64
44 EFI应用程序一样加载,EFI规范中规定在内核镜像的开始需要PE/COFF镜像文件头。为了
45 支持EFI桩,应该用“MZ”魔术字符替换掉code0,并且res3(偏移量未0x3c)应指向PE/COFF
/openbmc/linux/arch/arm/boot/compressed/
H A Defi-header.S19 @ PE/COFF signature "MZ" in the first two bytes, so the kernel
36 @ The PE header can be anywhere in the file, but for
38 @ The offset to the PE/COFF header needs to be at offset
41 @ PE/COFF offset, and the "MZ" bytes at offset 0x0.
43 .long pe_header - start @ Offset to the PE header.
/openbmc/linux/Documentation/riscv/
H A Dboot-image-header.rst22 u32 res3; /* Reserved for PE COFF offset */
24 This header format is compliant with PE/COFF header and largely inspired from
32 needs PE/COFF image header in the beginning of the kernel image in order to
35 PE/COFF header.
/openbmc/openbmc/poky/meta/recipes-devtools/python/
H A Dpython3-pefile_2024.8.26.bb1 SUMMARY = "Python PE parsing module"
2 DESCRIPTION = "A multi-platform Python module to parse and work with Portable Executable (PE) files…
/openbmc/linux/Documentation/translations/zh_CN/arch/loongarch/
H A Dbooting.rst37 内核镜像是EFI镜像。作为PE文件,它们有一个64字节的头部结构体,如下所示::
48 u32 pe_header - _head /* 到PE头的偏移量 */
/openbmc/linux/arch/m68k/include/asm/
H A DMC68328.h538 #define PE(x) (1 << (x)) macro
540 #define PE_CSA1 PE(1) /* Use CSA1 as PE(1) */
541 #define PE_CSA2 PE(2) /* Use CSA2 as PE(2) */
542 #define PE_CSA3 PE(3) /* Use CSA3 as PE(3) */
543 #define PE_CSB0 PE(4) /* Use CSB0 as PE(4) */
544 #define PE_CSB1 PE(5) /* Use CSB1 as PE(5) */
545 #define PE_CSB2 PE(6) /* Use CSB2 as PE(6) */
546 #define PE_CSB3 PE(7) /* Use CSB3 as PE(7) */
/openbmc/linux/Documentation/translations/zh_CN/arch/arm64/
H A Dbooting.txt102 u32 res5; /* 保留 (用于 PE COFF 偏移) */
112 res5 是到 PE 文件头的偏移,而 PE 文件头含有 EFI 的启动入口点
/openbmc/linux/Documentation/translations/zh_TW/arch/arm64/
H A Dbooting.txt106 u32 res5; /* 保留 (用於 PE COFF 偏移) */
116 res5 是到 PE 文件頭的偏移,而 PE 文件頭含有 EFI 的啓動入口點
/openbmc/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_read_leveling.c847 dram_info->rl_val[cs][idx][PE] = phase; in ddr3_read_leveling_single_cs_window_mode()
1099 DEBUG_RL_D((u32) dram_info->rl_val[cs][pup][PE], 1); in ddr3_read_leveling_single_cs_window_mode()
1112 if (dram_info->rl_val[cs][idx][PE] == 4) in ddr3_read_leveling_single_cs_window_mode()
1113 dram_info->rl_val[cs][idx][PE] = 1; in ddr3_read_leveling_single_cs_window_mode()
1117 delay_e = dram_info->rl_val[cs][idx][PE] * in ddr3_read_leveling_single_cs_window_mode()
1134 delay_e = dram_info->rl_val[cs][idx][PE] * in ddr3_read_leveling_single_cs_window_mode()
1150 if (dram_info->rl_val[cs][idx][PE] > 1) in ddr3_read_leveling_single_cs_window_mode()
1151 dram_info->rl_val[cs][idx][PE] -= 2; in ddr3_read_leveling_single_cs_window_mode()
1156 delay_e = dram_info->rl_val[cs][idx][PE] * MAX_DELAY + in ddr3_read_leveling_single_cs_window_mode()
/openbmc/linux/Documentation/arch/loongarch/
H A Dbooting.rst30 Linux/LoongArch kernel images are EFI images. Being PE files, they have
42 u32 pe_header - _head /* Offset to the PE header */
/openbmc/openbmc/poky/meta/classes-global/
H A Dpackagedata.bbclass12 "PE" : d.getVar('PE'),
/openbmc/openbmc/poky/meta/recipes-rt/rt-tests/
H A Drt-tests.inc3 PE = "1"
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-graphics/xorg-doc/
H A Dxorg-sgml-doctools_1.12.bb3 PE = "1"
/openbmc/openbmc/poky/meta-skeleton/recipes-skeleton/libxpm/
H A Dlibxpm_3.5.6.bb7 PE = "1"
/openbmc/openbmc/poky/meta/recipes-graphics/xorg-lib/
H A Dlibxkbfile_1.1.3.bb13 PE = "1"
H A Dlibfontenc_1.1.8.bb12 PE = "1"
/openbmc/openbmc/poky/meta/recipes-graphics/xorg-app/
H A Dxvinfo_1.1.5.bb11 PE = "1"
H A Dxwininfo_1.1.6.bb12 PE = "0"
/openbmc/openbmc/meta-security/meta-tpm/recipes-tpm/libtpm/
H A Dlibtpms_0.10.0.bb8 PE = "2"
/openbmc/openbmc/meta-openembedded/meta-filesystems/recipes-support/physfs/
H A Dphysfs_3.0.2.bb9 PE = "1"
/openbmc/linux/Documentation/driver-api/
H A Dvfio.rst474 one table per a IOMMU group which is a Partitionable Endpoint (PE)
475 (PE is often a PCI domain but not always).
483 out of the window leads to the whole PE isolation.
492 4) According to sPAPR specification, A Partitionable Endpoint (PE) is an I/O
494 error recovery. A PE may be a single or multi-function IOA (IO Adapter), a
561 * PE, and put child devices belonging to same IOMMU group to the
562 * PE instance for later reference.
565 /* Check the PE's state and make sure it's in functional state */
588 * of the PCI device. Check the PE's state to see if that has been
594 * produce any more PCI traffic from/to the affected PE until
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