| /openbmc/u-boot/arch/arm/mach-davinci/include/mach/ |
| H A D | psc_defs.h | 55 #define PD0 (0) macro
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| /openbmc/linux/Documentation/hwmon/ |
| H A D | max197.rst | 47 7,6 PD1,PD0 Clock and Power-Down modes
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| /openbmc/u-boot/arch/arm/dts/ |
| H A D | at91sam9m10g45ek.dts | 150 <AT91_PIOD 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PD0 periph B */
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| H A D | sun50i-a64.dtsi | 585 pins = "PD0", "PD1", "PD2", "PD3";
610 pins = "PD0", "PD1";
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| H A D | sunxi-h3-h5.dtsi | 397 pins = "PD0", "PD1", "PD2", "PD3", "PD4",
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| H A D | at91sam9263.dtsi | 453 <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A with pullup */
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| H A D | at91sam9x5.dtsi | 570 <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD0 periph A Read Enable */
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| H A D | sun9i-a80.dtsi | 957 pins = "PD0", "PD1", "PD2", "PD3",
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| H A D | at91sam9g45.dtsi | 699 <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD0 periph A */
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| H A D | sun6i-a31.dtsi | 634 pins = "PD0", "PD1", "PD2", "PD3",
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| /openbmc/linux/arch/arm/boot/dts/microchip/ |
| H A D | at91sam9m10g45ek.dts | 161 <AT91_PIOD 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PD0 periph B */
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| H A D | at91sam9g45.dtsi | 462 <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD0 periph A */
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| H A D | sama5d3.dtsi | 706 AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A MCI0_CDA with pullup */
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| /openbmc/linux/arch/mips/boot/dts/ingenic/ |
| H A D | qi_lb60.dts | 343 pins = "PD0", "PD2";
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| /openbmc/linux/arch/arm/boot/dts/allwinner/ |
| H A D | suniv-f1c100s.dtsi | 197 pins = "PD0", "PD12";
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| H A D | sunxi-h3-h5.dtsi | 422 pins = "PD0", "PD1", "PD2", "PD3", "PD4",
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| H A D | sun9i-a80.dtsi | 997 pins = "PD0", "PD1", "PD2", "PD3",
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| /openbmc/linux/arch/arm64/boot/dts/allwinner/ |
| H A D | sun50i-a64.dtsi | 729 pins = "PD0", "PD1", "PD2", "PD3", "PD4",
800 pins = "PD0", "PD1", "PD2", "PD3";
825 pins = "PD0", "PD1";
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| H A D | sun50i-h6.dtsi | 331 pins = "PD0", "PD1", "PD2", "PD3", "PD4",
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| /openbmc/linux/arch/riscv/boot/dts/allwinner/ |
| H A D | sunxi-d1s-t113.dtsi | 75 pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5",
83 pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5",
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| /openbmc/linux/arch/powerpc/boot/dts/ |
| H A D | kmeter1.dts | 223 3 0 1 0 1 0 /* TxD0 (PD0, out, f1) */
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| /openbmc/linux/drivers/pinctrl/renesas/ |
| H A D | pfc-shx3.c | 323 PINMUX_GPIO(PD0),
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| H A D | pfc-sh7786.c | 445 PINMUX_GPIO(PD0),
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| H A D | pfc-sh7785.c | 709 PINMUX_GPIO(PD0),
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| /openbmc/linux/drivers/iommu/ |
| H A D | msm_iommu_hw-8xxx.h | 588 #define SET_PD0(b, c, v) SET_CONTEXT_FIELD(b, c, TTBCR, PD0, v)
775 #define GET_PD0(b, c) GET_CONTEXT_FIELD(b, c, TTBCR, PD0)
1155 #define PD0 (PD0_MASK << PD0_SHIFT) macro
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