Searched refs:PCI_MSI_FLAGS_QSIZE (Results 1 – 13 of 13) sorted by relevance
90 ((flags & PCI_MSI_FLAGS_QSIZE) >> ctz32(PCI_MSI_FLAGS_QSIZE)); in msi_nr_vectors()238 PCI_MSI_FLAGS_QSIZE | PCI_MSI_FLAGS_ENABLE); in msi_init()284 flags &= ~(PCI_MSI_FLAGS_QSIZE | PCI_MSI_FLAGS_ENABLE); in msi_reset()452 (flags & PCI_MSI_FLAGS_QSIZE) >> ctz32(PCI_MSI_FLAGS_QSIZE); in msi_write_config()456 flags &= ~PCI_MSI_FLAGS_QSIZE; in msi_write_config()457 flags |= log_max_vecs << ctz32(PCI_MSI_FLAGS_QSIZE); in msi_write_config()
88 configured_private_bits = (control & PCI_MSI_FLAGS_QSIZE) >> 4; in arch_setup_msi_irq()180 control &= ~PCI_MSI_FLAGS_QSIZE; in arch_setup_msi_irq()
355 1 << ((msg_ctl & PCI_MSI_FLAGS_QSIZE) >> 4), in marvel_map_irq()358 1 << ((msg_ctl & PCI_MSI_FLAGS_QSIZE) >> 4), in marvel_map_irq()
265 mme = (flags & PCI_MSI_FLAGS_QSIZE) >> 4; in cdns_pcie_ep_get_msi()397 mme = (flags & PCI_MSI_FLAGS_QSIZE) >> 4; in cdns_pcie_ep_send_msi_irq()452 mme = (flags & PCI_MSI_FLAGS_QSIZE) >> 4; in cdns_pcie_ep_map_msi_irq()
190 msgctl &= ~PCI_MSI_FLAGS_QSIZE; in pci_write_msg_msi()523 control &= ~PCI_MSI_FLAGS_QSIZE; in __pci_restore_msi_state()
309 #define PCI_MSI_FLAGS_QSIZE 0x0070 /* Message queue size configured */ macro
310 #define PCI_MSI_FLAGS_QSIZE 0x0070 /* Message queue size configured */ macro
1179 if ((flags & PCI_MSI_FLAGS_QSIZE) >> 4 > vdev->msi_qmax) { in vfio_msi_config_write()1180 flags &= ~PCI_MSI_FLAGS_QSIZE; in vfio_msi_config_write()
345 val = (val & PCI_MSI_FLAGS_QSIZE) >> 4; in dw_pcie_ep_get_msi()
405 #define PCI_MSI_FLAGS_QSIZE 0x70 /* Message queue size configured */ macro
402 reg |= FIELD_PREP(PCI_MSI_FLAGS_QSIZE, queue_size); in mc_pcie_enable_msi()
1109 if (*val & PCI_MSI_FLAGS_QSIZE) { in xen_pt_msgctrl_reg_write()
435 ASSERT_BIT_CLEAR(dataw, PCI_MSI_FLAGS_QSIZE); in ahci_test_msicap()