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Searched refs:PAD_CTL_SRE_SLOW (Results 1 – 25 of 33) sorted by relevance

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/openbmc/u-boot/board/barco/platinum/
H A Dplatinum.h15 #define ECSPI1_PAD_CLK (PAD_CTL_SRE_SLOW | PAD_CTL_PUS_100K_DOWN | \
21 #define ECSPI_PAD_MOSI (PAD_CTL_SRE_SLOW | PAD_CTL_PUS_100K_DOWN | \
27 #define ECSPI_PAD_SS (PAD_CTL_SRE_SLOW | PAD_CTL_PUS_100K_UP | \
39 PAD_CTL_ODE | PAD_CTL_SRE_SLOW)
/openbmc/u-boot/board/compulab/cl-som-imx7/
H A Dmux.c22 #define USDHC_PAD_CTRL (PAD_CTL_DSE_3P3V_32OHM | PAD_CTL_SRE_SLOW | \
53 #define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SRE_SLOW | \
57 PAD_CTL_SRE_SLOW)
H A Dspl.c34 PAD_CTL_PUE | PAD_CTL_SRE_SLOW)
H A Dcl-som-imx7.c30 #define I2C_PAD_CTRL (PAD_CTL_DSE_3P3V_32OHM | PAD_CTL_SRE_SLOW | \
/openbmc/u-boot/board/tqc/tqma6/
H A Dtqma6_wru4.c43 PAD_CTL_SRE_SLOW \
145 PAD_CTL_SRE_SLOW \
195 PAD_CTL_SRE_SLOW \
205 PAD_CTL_SRE_SLOW \
/openbmc/u-boot/board/freescale/mx35pdk/
H A Dmx35pdk.c89 PAD_CTL_DSE_LOW | PAD_CTL_SRE_SLOW)
90 #define USBOTG_OUT_PAD_CTRL (PAD_CTL_DSE_LOW | PAD_CTL_SRE_SLOW)
105 #define FEC_PAD_CTRL (PAD_CTL_DSE_LOW | PAD_CTL_SRE_SLOW)
/openbmc/u-boot/arch/arm/include/asm/mach-imx/
H A Diomux-v3.h124 #define PAD_CTL_SRE_SLOW (0x1 << 2) macro
234 #define PAD_CTL_SRE_SLOW (0 << 0) macro
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dfsl,imx25-pinctrl.txt20 PAD_CTL_SRE_SLOW (0 << 0)
H A Dfsl,imx35-pinctrl.txt30 PAD_CTL_SRE_SLOW (0 << 0)
H A Dfsl,imx51-pinctrl.txt29 PAD_CTL_SRE_SLOW (0 << 0)
H A Dfsl,imx50-pinctrl.txt29 PAD_CTL_SRE_SLOW (0 << 0)
H A Dfsl,imx53-pinctrl.txt29 PAD_CTL_SRE_SLOW (0 << 0)
H A Dfsl,imx6q-pinctrl.txt35 PAD_CTL_SRE_SLOW (0 << 0)
H A Dfsl,imx6sl-pinctrl.txt36 PAD_CTL_SRE_SLOW (0 << 0)
H A Dfsl,imx6dl-pinctrl.txt35 PAD_CTL_SRE_SLOW (0 << 0)
H A Dfsl,imx6sx-pinctrl.txt36 PAD_CTL_SRE_SLOW (0 << 0)
H A Dfsl,vf610-pinctrl.txt19 PAD_CTL_SRE_SLOW (0 << 11)
H A Dfsl,imx6ul-pinctrl.txt37 PAD_CTL_SRE_SLOW (0 << 0)
H A Dfsl,imx6sll-pinctrl.txt37 PAD_CTL_SRE_SLOW (0 << 0)
H A Dfsl,imx7ulp-pinctrl.txt34 PAD_CTL_SRE_SLOW (1 << 2)
/openbmc/u-boot/arch/arm/include/asm/arch-mx7ulp/
H A Diomux.h85 #define PAD_CTL_SRE_SLOW (1 << 2) macro
/openbmc/u-boot/board/freescale/mx51evk/
H A Dmx51evk_video.c57 PAD_CTL_PKE | PAD_CTL_DSE_MAX | PAD_CTL_SRE_SLOW)); in setup_iomux_lcd()
/openbmc/u-boot/board/technexion/pico-imx7d/
H A Dpico-imx7d.c31 #define USDHC_PAD_CTRL (PAD_CTL_DSE_3P3V_32OHM | PAD_CTL_SRE_SLOW | \
39 #define I2C_PAD_CTRL (PAD_CTL_DSE_3P3V_32OHM | PAD_CTL_SRE_SLOW | \
/openbmc/u-boot/board/phytec/pcl063/
H A Dpcl063.c56 #define NAND_PAD_CTRL (PAD_CTL_DSE_48ohm | PAD_CTL_SRE_SLOW | PAD_CTL_HYS)
/openbmc/u-boot/board/toradex/colibri_imx6/
H A Dcolibri_imx6.c70 PAD_CTL_SRE_SLOW)
74 PAD_CTL_SRE_SLOW)
78 PAD_CTL_HYS | PAD_CTL_SRE_SLOW)

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