| /openbmc/u-boot/arch/arm/include/asm/mach-imx/ |
| H A D | iomux-v3.h | 105 #define PAD_CTL_PUE (0x1 << 6) macro
127 #define PAD_CTL_PUE (0x1 << 4) macro
129 #define PAD_CTL_PUS_PD100KOHM ((0x0 << 5) | PAD_CTL_PUE)
130 #define PAD_CTL_PUS_PU5KOHM ((0x1 << 5) | PAD_CTL_PUE)
131 #define PAD_CTL_PUS_PU47KOHM ((0x2 << 5) | PAD_CTL_PUE)
132 #define PAD_CTL_PUS_PU100KOHM ((0x3 << 5) | PAD_CTL_PUE)
140 #define PAD_CTL_PUS_100K_DOWN (0 << 14 | PAD_CTL_PUE)
141 #define PAD_CTL_PUS_47K_UP (1 << 14 | PAD_CTL_PUE)
142 #define PAD_CTL_PUS_100K_UP (2 << 14 | PAD_CTL_PUE)
143 #define PAD_CTL_PUS_22K_UP (3 << 14 | PAD_CTL_PUE)
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| /openbmc/u-boot/board/liebherr/display5/ |
| H A D | common.h | 10 #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
14 #define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
18 #define ENET_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
26 #define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
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| /openbmc/u-boot/board/gateworks/gw_ventana/ |
| H A D | common.h | 18 #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
22 #define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
26 #define ENET_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
38 #define IRQ_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
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| /openbmc/u-boot/board/ccv/xpress/ |
| H A D | xpress.c | 29 #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
33 #define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
37 #define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
42 #define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
46 #define MDIO_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
51 #define ENET_RX_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
54 #define OTGID_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
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| /openbmc/u-boot/arch/arm/include/asm/arch-mx7ulp/ |
| H A D | iomux.h | 86 #define PAD_CTL_PUE (1 << 1) macro
87 #define PAD_CTL_PUS_UP ((1 << 0) | PAD_CTL_PUE)
88 #define PAD_CTL_PUS_DOWN ((0 << 0) | PAD_CTL_PUE)
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| /openbmc/u-boot/board/technexion/pico-imx6ul/ |
| H A D | pico-imx6ul.c | 28 #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
32 #define OTG_ID_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
36 #define MDIO_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
39 #define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
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| /openbmc/u-boot/board/grinn/liteboard/ |
| H A D | board.c | 30 #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
34 #define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
38 #define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
42 #define MDIO_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
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| /openbmc/u-boot/board/kosagi/novena/ |
| H A D | novena_spl.c | 30 (PAD_CTL_PKE | PAD_CTL_PUE | \
35 (PAD_CTL_PKE | PAD_CTL_PUE | \
40 (PAD_CTL_PKE | PAD_CTL_PUE | \
45 (PAD_CTL_PKE | PAD_CTL_PUE | \
49 (PAD_CTL_PKE | PAD_CTL_PUE | \
58 (PAD_CTL_PKE | PAD_CTL_PUE | \
64 (PAD_CTL_PKE | PAD_CTL_PUE | \
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| /openbmc/u-boot/board/freescale/mx6ul_14x14_evk/ |
| H A D | mx6ul_14x14_evk.c | 33 #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
37 #define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
41 #define USDHC_DAT3_CD_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
45 #define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
50 #define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
54 #define LCD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
57 #define MDIO_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
62 #define OTG_ID_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
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| /openbmc/u-boot/board/udoo/neo/ |
| H A D | neo.c | 43 #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
47 #define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
51 #define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
56 #define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
63 #define ENET_RX_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
66 #define WDOG_PAD_CTRL (PAD_CTL_PUE | PAD_CTL_PKE | PAD_CTL_SPEED_MED | \
69 #define BOARD_DETECT_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
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| /openbmc/u-boot/board/tqc/tqma6/ |
| H A D | tqma6_wru4.c | 39 PAD_CTL_PUE | \
141 PAD_CTL_PUE | \
192 PAD_CTL_PUE | \
201 PAD_CTL_PUE | \
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| /openbmc/u-boot/board/freescale/mx6sxsabreauto/ |
| H A D | mx6sxsabreauto.c | 32 #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
36 #define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
43 #define ENET_RX_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
46 #define GPMI_PAD_CTRL0 (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP)
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| /openbmc/u-boot/board/freescale/mx6sxsabresd/ |
| H A D | mx6sxsabresd.c | 31 #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
35 #define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
39 #define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
46 #define ENET_RX_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
49 #define LCD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
52 #define WDOG_PAD_CTRL (PAD_CTL_PUE | PAD_CTL_PKE | PAD_CTL_SPEED_MED | \
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| /openbmc/u-boot/board/phytec/pcl063/ |
| H A D | pcl063.c | 31 #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
93 #define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
97 #define MDIO_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
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| /openbmc/u-boot/board/freescale/imx8mq_evk/ |
| H A D | spl.c | 39 #define I2C_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE)
75 #define USDHC_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE | \
77 #define USDHC_GPIO_PAD_CTRL (PAD_CTL_PUE | PAD_CTL_DSE1)
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| H A D | imx8mq_evk.c | 30 #define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE)
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| /openbmc/u-boot/board/compulab/cl-som-imx7/ |
| H A D | mux.c | 23 PAD_CTL_HYS | PAD_CTL_PUE | \
56 #define GPIO_PAD_CTRL (PAD_CTL_PUS_PU5KOHM | PAD_CTL_PUE | \
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| /openbmc/linux/Documentation/devicetree/bindings/pinctrl/ |
| H A D | fsl,imx25-pinctrl.txt | 9 PAD_CTL_PUE (1 << 6)
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| H A D | fsl,imx35-pinctrl.txt | 19 PAD_CTL_PUE (1 << 6)
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| H A D | fsl,imx51-pinctrl.txt | 18 PAD_CTL_PUE (1 << 6)
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| H A D | fsl,imx50-pinctrl.txt | 18 PAD_CTL_PUE (1 << 6)
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| H A D | fsl,imx53-pinctrl.txt | 18 PAD_CTL_PUE (1 << 6)
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| /openbmc/u-boot/board/freescale/mx6ullevk/ |
| H A D | mx6ullevk.c | 23 #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
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| /openbmc/u-boot/board/logicpd/imx6/ |
| H A D | imx6logic.c | 30 #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
34 #define NAND_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
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| /openbmc/u-boot/board/freescale/mx6sllevk/ |
| H A D | mx6sllevk.c | 25 #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
|