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Searched refs:NUM_BANKS (Results 1 – 21 of 21) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v6_0.c87 #define NUM_BANKS(x) ((x) << 20) macro
412 NUM_BANKS(ADDR_SURF_16_BANK); in gfx_v6_0_tiling_mode_table_init()
420 NUM_BANKS(ADDR_SURF_16_BANK); in gfx_v6_0_tiling_mode_table_init()
428 NUM_BANKS(ADDR_SURF_16_BANK); in gfx_v6_0_tiling_mode_table_init()
435 NUM_BANKS(ADDR_SURF_8_BANK) | in gfx_v6_0_tiling_mode_table_init()
447 NUM_BANKS(ADDR_SURF_4_BANK); in gfx_v6_0_tiling_mode_table_init()
455 NUM_BANKS(ADDR_SURF_4_BANK); in gfx_v6_0_tiling_mode_table_init()
463 NUM_BANKS(ADDR_SURF_2_BANK); in gfx_v6_0_tiling_mode_table_init()
475 NUM_BANKS(ADDR_SURF_16_BANK); in gfx_v6_0_tiling_mode_table_init()
483 NUM_BANKS(ADDR_SURF_16_BANK); in gfx_v6_0_tiling_mode_table_init()
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H A Dgfx_v8_0.c76 #define NUM_BANKS(x) ((x) << GB_MACROTILE_MODE0__NUM_BANKS__SHIFT) macro
2198 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
2202 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
2206 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
2210 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
2214 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
2218 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
2222 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v8_0_tiling_mode_table_init()
2226 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
2230 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v8_0_tiling_mode_table_init()
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H A Dgfx_v7_0.c1125 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v7_0_tiling_mode_table_init()
1129 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v7_0_tiling_mode_table_init()
1133 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v7_0_tiling_mode_table_init()
1137 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v7_0_tiling_mode_table_init()
1141 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v7_0_tiling_mode_table_init()
1145 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v7_0_tiling_mode_table_init()
1149 NUM_BANKS(ADDR_SURF_4_BANK)); in gfx_v7_0_tiling_mode_table_init()
1153 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v7_0_tiling_mode_table_init()
1157 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v7_0_tiling_mode_table_init()
1161 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v7_0_tiling_mode_table_init()
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H A Dcikd.h197 # define NUM_BANKS(x) ((x) << 6) macro
H A Dsdma_v4_4_2.c107 val = REG_SET_FIELD(val, SDMA_GB_ADDR_CONFIG, NUM_BANKS, 4); in sdma_v4_4_2_inst_init_golden_registers()
113 val = REG_SET_FIELD(val, SDMA_GB_ADDR_CONFIG_READ, NUM_BANKS, in sdma_v4_4_2_inst_init_golden_registers()
H A Dsid.h1218 # define NUM_BANKS(x) ((x) << 20) macro
H A Ddce_v6_0.c1945 num_banks = AMDGPU_TILING_GET(tiling_flags, NUM_BANKS); in dce_v6_0_crtc_do_set_base()
H A Ddce_v8_0.c1914 num_banks = AMDGPU_TILING_GET(tiling_flags, NUM_BANKS); in dce_v8_0_crtc_do_set_base()
H A Ddce_v10_0.c1989 num_banks = AMDGPU_TILING_GET(tiling_flags, NUM_BANKS); in dce_v10_0_crtc_do_set_base()
H A Ddce_v11_0.c2039 num_banks = AMDGPU_TILING_GET(tiling_flags, NUM_BANKS); in dce_v11_0_crtc_do_set_base()
H A Dgfx_v9_4_3.c714 NUM_BANKS); in gfx_v9_4_3_gpu_early_init()
H A Dgfx_v9_0.c1944 NUM_BANKS); in gfx_v9_0_gpu_early_init()
/openbmc/linux/drivers/gpu/drm/radeon/
H A Dsi.c2519 NUM_BANKS(ADDR_SURF_16_BANK) | in si_tiling_mode_table_init()
2528 NUM_BANKS(ADDR_SURF_16_BANK) | in si_tiling_mode_table_init()
2537 NUM_BANKS(ADDR_SURF_16_BANK) | in si_tiling_mode_table_init()
2546 NUM_BANKS(ADDR_SURF_16_BANK) | in si_tiling_mode_table_init()
2555 NUM_BANKS(ADDR_SURF_16_BANK) | in si_tiling_mode_table_init()
2564 NUM_BANKS(ADDR_SURF_16_BANK) | in si_tiling_mode_table_init()
2573 NUM_BANKS(ADDR_SURF_16_BANK) | in si_tiling_mode_table_init()
2582 NUM_BANKS(ADDR_SURF_16_BANK) | in si_tiling_mode_table_init()
2591 NUM_BANKS(ADDR_SURF_16_BANK) | in si_tiling_mode_table_init()
2600 NUM_BANKS(ADDR_SURF_16_BANK) | in si_tiling_mode_table_init()
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H A Dcik.c2439 NUM_BANKS(ADDR_SURF_16_BANK)); in cik_tiling_mode_table_init()
2443 NUM_BANKS(ADDR_SURF_16_BANK)); in cik_tiling_mode_table_init()
2447 NUM_BANKS(ADDR_SURF_16_BANK)); in cik_tiling_mode_table_init()
2451 NUM_BANKS(ADDR_SURF_16_BANK)); in cik_tiling_mode_table_init()
2455 NUM_BANKS(ADDR_SURF_8_BANK)); in cik_tiling_mode_table_init()
2459 NUM_BANKS(ADDR_SURF_4_BANK)); in cik_tiling_mode_table_init()
2463 NUM_BANKS(ADDR_SURF_2_BANK)); in cik_tiling_mode_table_init()
2467 NUM_BANKS(ADDR_SURF_16_BANK)); in cik_tiling_mode_table_init()
2471 NUM_BANKS(ADDR_SURF_16_BANK)); in cik_tiling_mode_table_init()
2475 NUM_BANKS(ADDR_SURF_16_BANK)); in cik_tiling_mode_table_init()
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H A Dsid.h1221 # define NUM_BANKS(x) ((x) << 20) macro
H A Dcikd.h1275 # define NUM_BANKS(x) ((x) << 6) macro
/openbmc/linux/drivers/pinctrl/nomadik/
H A Dpinctrl-nomadik.c289 #define NUM_BANKS ARRAY_SIZE(nmk_gpio_chips) macro
550 for (i = 0; i < NUM_BANKS; i++) { in nmk_gpio_glitch_slpm_init()
568 for (i = 0; i < NUM_BANKS; i++) { in nmk_gpio_glitch_slpm_restore()
1532 static unsigned int slpm[NUM_BANKS]; in nmk_pmx_set()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_hubp.h269 HUBP_SF(HUBP0_DCSURF_ADDR_CONFIG, NUM_BANKS, mask_sh),\
467 type NUM_BANKS;\
H A Ddcn10_hubp.c150 NUM_BANKS, log_2(info->gfx9.num_banks), in hubp1_program_tiling()
/openbmc/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_plane.c192 num_banks = AMDGPU_TILING_GET(tiling_flags, NUM_BANKS); in fill_gfx8_tiling_info_from_flags()
/openbmc/linux/drivers/gpu/drm/amd/include/
H A Dnavi10_enum.h1549 typedef enum NUM_BANKS { enum
1555 } NUM_BANKS; typedef