| /openbmc/linux/arch/alpha/include/asm/ |
| H A D | irq.h | 29 # define NR_IRQS (128) /* max is RAWHIDE/TAKARA */ macro
31 # define NR_IRQS (32768 + 16) /* marvel - 32 pids */ macro
39 # define NR_IRQS 35 macro
44 # define NR_IRQS 32 macro
51 # define NR_IRQS 48 macro
55 # define NR_IRQS 40 macro
60 # define NR_IRQS 64 macro
63 #define NR_IRQS 80 macro
68 # define NR_IRQS 128 macro
71 # define NR_IRQS 2048 /* enuff for 8 QBBs */ macro
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| /openbmc/linux/arch/m68k/include/asm/ |
| H A D | irq.h | 14 #define NR_IRQS 256 macro
17 #define NR_IRQS 200 macro
19 #define NR_IRQS 141 macro
21 #define NR_IRQS 72 macro
23 #define NR_IRQS 43 macro
25 #define NR_IRQS 32 macro
27 #define NR_IRQS 24 macro
29 #define NR_IRQS 8 macro
31 #define NR_IRQS 0 macro
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| /openbmc/qemu/include/hw/intc/ |
| H A D | rx_icu.h | 42 NR_IRQS = 256 enumerator
51 struct IRQSource src[NR_IRQS];
57 uint8_t ir[NR_IRQS];
58 uint8_t dtcer[NR_IRQS];
59 uint8_t ier[NR_IRQS / 8];
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| /openbmc/linux/arch/ia64/kernel/ |
| H A D | irq.c | 55 static char irq_redir [NR_IRQS]; // = { [0 ... NR_IRQS-1] = 1 };
59 if (irq < NR_IRQS) { in set_irq_affinity_info()
74 unsigned int vectors_in_migration[NR_IRQS];
84 for (irq=0; irq < NR_IRQS; irq++) { in migrate_irqs()
162 for (irq=0; irq < NR_IRQS; irq++) { in fixup_irqs()
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| H A D | irq_ia64.c | 72 struct irq_cfg irq_cfg[NR_IRQS] __read_mostly = {
73 [0 ... NR_IRQS - 1] = {
87 static int irq_status[NR_IRQS] = {
88 [0 ... NR_IRQS -1] = IRQ_UNUSED
95 for (irq = IA64_FIRST_DEVICE_VECTOR; irq < NR_IRQS; irq++) in find_unassigned_irq()
126 BUG_ON((unsigned)irq >= NR_IRQS); in __bind_irq_vector()
162 BUG_ON((unsigned)irq >= NR_IRQS); in __clear_irq_vector()
239 for (irq = 0; irq < NR_IRQS; ++irq) { in __setup_vector_irq()
516 extern unsigned int vectors_in_migration[NR_IRQS]; in ia64_process_pending_intr()
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| /openbmc/linux/arch/x86/include/asm/ |
| H A D | irq_vectors.h | 130 #define NR_IRQS \ macro
135 #define NR_IRQS (NR_VECTORS + IO_APIC_VECTOR_LIMIT) macro
137 #define NR_IRQS (NR_VECTORS + CPU_VECTOR_LIMIT) macro
139 #define NR_IRQS NR_IRQS_LEGACY macro
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| /openbmc/linux/tools/arch/x86/include/asm/ |
| H A D | irq_vectors.h | 130 #define NR_IRQS \ macro
135 #define NR_IRQS (NR_VECTORS + IO_APIC_VECTOR_LIMIT) macro
137 #define NR_IRQS (NR_VECTORS + CPU_VECTOR_LIMIT) macro
139 #define NR_IRQS NR_IRQS_LEGACY macro
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| /openbmc/linux/arch/sparc/kernel/ |
| H A D | irq_32.c | 113 static struct irq_bucket irq_table[NR_IRQS];
129 for (i = 1; i < NR_IRQS; i++) { in irq_alloc()
134 for (i = 1; i < NR_IRQS; i++) { in irq_alloc()
139 if (i < NR_IRQS) { in irq_alloc()
163 BUG_ON(irq >= NR_IRQS); in irq_link()
181 BUG_ON(irq >= NR_IRQS); in irq_unlink()
254 cpu_irq = (irq & (NR_IRQS - 1)); in sparc_floppy_request_irq()
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| /openbmc/u-boot/arch/m68k/lib/ |
| H A D | interrupts.c | 15 #define NR_IRQS (CONFIG_SYS_NUM_IRQS) macro
25 static struct interrupt_action irq_vecs[NR_IRQS];
47 if ((vec < 0) || (vec >= NR_IRQS)) { in irq_install_handler()
59 if ((vec < 0) || (vec >= NR_IRQS)) { in irq_free_handler()
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| /openbmc/linux/arch/mips/include/asm/mach-db1x00/ |
| H A D | irq.h | 12 #ifdef NR_IRQS
13 #undef NR_IRQS
21 #define NR_IRQS 152 macro
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| /openbmc/qemu/hw/intc/ |
| H A D | rx_icu.c | 96 if (n_IRQ >= NR_IRQS) { in rxicu_set_irq()
158 for (i = 0; i < NR_IRQS; i++) { in rxicu_ack_irq()
311 for (i = 0; i < NR_IRQS; i++) { in rxicu_realize()
330 qdev_init_gpio_in(DEVICE(d), rxicu_set_irq, NR_IRQS); in rxicu_init()
349 VMSTATE_UINT8_ARRAY(ir, RXICUState, NR_IRQS),
350 VMSTATE_UINT8_ARRAY(dtcer, RXICUState, NR_IRQS),
351 VMSTATE_UINT8_ARRAY(ier, RXICUState, NR_IRQS / 8),
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| /openbmc/linux/include/asm-generic/ |
| H A D | irq.h | 10 #ifndef NR_IRQS
11 #define NR_IRQS 64 macro
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| /openbmc/linux/arch/mips/include/asm/mach-generic/ |
| H A D | irq.h | 11 #ifndef NR_IRQS
12 #define NR_IRQS 256 macro
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| /openbmc/linux/arch/um/include/asm/ |
| H A D | irq.h | 33 #define NR_IRQS (UM_LAST_SIGNAL_IRQ + 64) macro
35 #define NR_IRQS UM_LAST_SIGNAL_IRQ macro
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| /openbmc/linux/arch/arm/mach-sa1100/include/mach/ |
| H A D | irqs.h | 98 #ifndef NR_IRQS
99 #define NR_IRQS (IRQ_BOARD_START + NR_IRQS_LOCOMO) macro
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| /openbmc/linux/drivers/irqchip/ |
| H A D | irq-xtensa-pic.c | 95 irq_domain_add_legacy(NULL, NR_IRQS - 1, 1, 0, in xtensa_pic_init_legacy()
105 irq_domain_add_linear(np, NR_IRQS, &xtensa_irq_domain_ops, in xtensa_pic_init()
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| H A D | irq-pic32-evic.c | 36 u32 irq_types[NR_IRQS];
173 if (WARN_ON(intspec[0] >= NR_IRQS)) in pic32_irq_domain_xlate()
218 nchips = DIV_ROUND_UP(NR_IRQS, 32); in pic32_of_init()
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| H A D | irq-xtensa-mx.c | 170 irq_domain_add_legacy(NULL, NR_IRQS - 1, 1, 0, in xtensa_mx_init_legacy()
181 irq_domain_add_linear(np, NR_IRQS, &xtensa_mx_irq_domain_ops, in xtensa_mx_init()
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| /openbmc/linux/arch/m68k/coldfire/ |
| H A D | intc.c | 28 unsigned char mcf_irq2imr[NR_IRQS];
144 for (irq = 0; (irq < NR_IRQS); irq++) { in init_IRQ()
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| /openbmc/qemu/hw/sh4/ |
| H A D | r2d.c | 96 NR_IRQS enumerator
99 static const struct { short irl; uint16_t msk; } irqtab[NR_IRQS] = {
118 for (i = 0; i < NR_IRQS; i++) { in update_irl()
199 return qemu_allocate_irqs(r2d_fpga_irq_set, s, NR_IRQS); in r2d_fpga_init()
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| /openbmc/linux/arch/mips/include/asm/mach-malta/ |
| H A D | irq.h | 6 #define NR_IRQS 256 macro
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| /openbmc/linux/arch/mips/include/asm/mach-lantiq/falcon/ |
| H A D | irq.h | 12 #define NR_IRQS 328 macro
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| /openbmc/linux/arch/mips/include/asm/mach-lantiq/xway/ |
| H A D | irq.h | 12 #define NR_IRQS 256 macro
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| /openbmc/linux/arch/mips/include/asm/mach-ar7/ |
| H A D | irq.h | 12 #define NR_IRQS 256 macro
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| /openbmc/linux/arch/mips/include/asm/mach-n64/ |
| H A D | irq.h | 5 #define NR_IRQS 8 macro
|