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Searched refs:MSTPCR1 (Results 1 – 19 of 19) sorted by relevance

/openbmc/linux/arch/sh/kernel/cpu/sh4a/
H A Dclock-sh7757.c76 #define MSTPCR1 0xffc80034 macro
89 [MSTP127] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 27, 0),
90 [MSTP114] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 14, 0),
91 [MSTP113] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 13, 0),
92 [MSTP112] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 12, 0),
93 [MSTP111] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 11, 0),
94 [MSTP110] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 10, 0),
95 [MSTP103] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 3, 0),
96 [MSTP102] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 2, 0),
H A Dclock-sh7786.c80 #define MSTPCR1 0xffc40034 macro
115 [MSTP112] = SH_CLK_MSTP32(NULL, MSTPCR1, 12, 0),
116 [MSTP110] = SH_CLK_MSTP32(NULL, MSTPCR1, 10, 0),
117 [MSTP109] = SH_CLK_MSTP32(NULL, MSTPCR1, 9, 0),
118 [MSTP108] = SH_CLK_MSTP32(NULL, MSTPCR1, 8, 0),
119 [MSTP105] = SH_CLK_MSTP32(NULL, MSTPCR1, 5, 0),
120 [MSTP104] = SH_CLK_MSTP32(NULL, MSTPCR1, 4, 0),
121 [MSTP103] = SH_CLK_MSTP32(NULL, MSTPCR1, 3, 0),
122 [MSTP102] = SH_CLK_MSTP32(NULL, MSTPCR1, 2, 0),
H A Dclock-sh7734.c82 #define MSTPCR1 0xFFC80034 macro
146 [MSTP115] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 15, 0),
147 [MSTP114] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 14, 0),
148 [MSTP111] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 11, 0),
149 [MSTP109] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 9, 0),
150 [MSTP108] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 8, 0),
151 [MSTP107] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 7, 0),
152 [MSTP106] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 6, 0),
153 [MSTP103] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 3, 0),
154 [MSTP100] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 0, 0),
H A Dclock-sh7785.c81 #define MSTPCR1 0xffc80034 macro
109 [MSTP119] = SH_CLK_MSTP32(NULL, MSTPCR1, 19, 0),
110 [MSTP117] = SH_CLK_MSTP32(NULL, MSTPCR1, 17, 0),
111 [MSTP105] = SH_CLK_MSTP32(NULL, MSTPCR1, 5, 0),
112 [MSTP104] = SH_CLK_MSTP32(NULL, MSTPCR1, 4, 0),
113 [MSTP100] = SH_CLK_MSTP32(NULL, MSTPCR1, 0, 0),
H A Dclock-shx3.c74 #define MSTPCR1 0xffc00034 macro
95 [MSTP119] = SH_CLK_MSTP32(NULL, MSTPCR1, 19, 0),
96 [MSTP105] = SH_CLK_MSTP32(NULL, MSTPCR1, 5, 0),
97 [MSTP104] = SH_CLK_MSTP32(NULL, MSTPCR1, 4, 0),
H A Dclock-sh7724.c27 #define MSTPCR1 0xa4150034 macro
229 [HWBLK_KEYSC] = SH_CLK_MSTP32(&r_clk, MSTPCR1, 12, 0),
230 [HWBLK_RTC] = SH_CLK_MSTP32(&r_clk, MSTPCR1, 11, 0),
231 [HWBLK_IIC0] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 9, 0),
232 [HWBLK_IIC1] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 8, 0),
H A Dclock-sh7722.c25 #define MSTPCR1 0xa4150034 macro
152 [HWBLK_IIC] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 9, 0),
153 [HWBLK_RTC] = SH_CLK_MSTP32(&r_clk, MSTPCR1, 8, 0),
H A Dclock-sh7723.c26 #define MSTPCR1 0xa4150034 macro
170 [HWBLK_IIC] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 9, 0),
171 [HWBLK_RTC] = SH_CLK_MSTP32(&r_clk, MSTPCR1, 8, 0),
H A Dclock-sh7343.c22 #define MSTPCR1 0xa4150034 macro
163 [MSTP109] = MSTP(&div4_clks[DIV4_P], MSTPCR1, 9, 0),
164 [MSTP108] = MSTP(&div4_clks[DIV4_P], MSTPCR1, 8, 0),
H A Dclock-sh7366.c22 #define MSTPCR1 0xa4150034 macro
164 [MSTP109] = MSTP(&div4_clks[DIV4_P], MSTPCR1, 9, 0),
/openbmc/u-boot/board/renesas/r0p7734/
H A Dr0p7734.c30 #define MSTPCR1 (0xFFC80034) macro
38 writel((r & ~MSTPSR1_GETHER), MSTPCR1); in board_init()
/openbmc/linux/arch/sh/include/cpu-sh4/cpu/
H A Dfreq.h20 #define MSTPCR1 0xa4150034 macro
44 #define MSTPCR1 0xa4150034 macro
/openbmc/u-boot/board/alphaproject/ap_sh4a_4a/
H A Dap_sh4a_4a.c30 #define MSTPCR1 (0xFFC80034) macro
151 writel((r & ~MSTPSR1_GETHER), MSTPCR1); in board_init()
/openbmc/linux/arch/sh/boards/mach-sh7763rdp/
H A Dsetup.c204 __raw_writel(__raw_readl(MSTPCR1) & ~0x8, MSTPCR1); in sh7763rdp_setup()
/openbmc/u-boot/board/atmark-techno/armadillo-800eva/
H A Darmadillo-800eva.c238 #define MSTPCR1 0xE6150134 macro
252 clrbits_le32(MSTPCR1, TMU0_MSTP125); in board_early_init_f()
258 clrbits_le32(MSTPCR1, I2C0_MSTP116); in board_early_init_f()
/openbmc/linux/arch/sh/include/mach-common/mach/
H A Dsh7763rdp.h14 #define MSTPCR1 0xFFC80038 macro
/openbmc/u-boot/arch/sh/include/asm/
H A Dcpu_sh7723.h75 #define MSTPCR1 0xA4150034 macro
H A Dcpu_sh7724.h96 #define MSTPCR1 0xA4150034 macro
H A Dcpu_sh7722.h204 #define MSTPCR1 0xA4150034 macro