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Searched refs:MSTATUS_VS (Results 1 – 4 of 4) sorted by relevance

/openbmc/qemu/target/riscv/
H A Dcpu_helper.c186 vs = get_field(env->mstatus, MSTATUS_VS); in cpu_get_tb_cpu_state()
195 vs = MIN(vs, get_field(env->mstatus_hs, MSTATUS_VS)); in cpu_get_tb_cpu_state()
599 if (env->mstatus & MSTATUS_VS) { in riscv_cpu_vector_enabled()
600 if (env->virt_enabled && !(env->mstatus_hs & MSTATUS_VS)) { in riscv_cpu_vector_enabled()
613 MSTATUS64_UXL | MSTATUS_VS; in riscv_cpu_swap_hypervisor_regs()
H A Dcpu_bits.h548 #define MSTATUS_VS 0x00000600 macro
H A Dtranslate.c672 tcg_gen_ori_tl(tmp, tmp, MSTATUS_VS); in mark_vs_dirty()
677 tcg_gen_ori_tl(tmp, tmp, MSTATUS_VS); in mark_vs_dirty()
H A Dcsr.c760 env->mstatus |= MSTATUS_VS; in write_vxrm()
777 env->mstatus |= MSTATUS_VS; in write_vxsat()
794 env->mstatus |= MSTATUS_VS; in write_vstart()
815 env->mstatus |= MSTATUS_VS; in write_vcsr()
1515 (status & MSTATUS_VS) == MSTATUS_VS || in add_status_sd()
1622 mask |= MSTATUS_VS; in write_mstatus()