| /openbmc/linux/arch/powerpc/kernel/ |
| H A D | process.c | 127 newmsr |= MSR_VSX; in msr_check_and_set()
145 newmsr &= ~MSR_VSX; in __msr_check_and_clear()
161 msr &= ~MSR_VSX; in __giveup_fpu()
244 msr &= ~MSR_VSX; in __giveup_altivec()
310 WARN_ON((msr & MSR_VSX) && !((msr & MSR_FP) && (msr & MSR_VEC))); in __giveup_vsx()
323 msr_check_and_set(MSR_FP|MSR_VEC|MSR_VSX); in giveup_vsx()
325 msr_check_and_clear(MSR_FP|MSR_VEC|MSR_VSX); in giveup_vsx()
334 cpumsr = msr_check_and_set(MSR_FP|MSR_VEC|MSR_VSX); in enable_kernel_vsx()
337 (current->thread.regs->msr & (MSR_VSX|MSR_VEC|MSR_FP))) { in enable_kernel_vsx()
358 if (tsk->thread.regs->msr & (MSR_VSX|MSR_VEC|MSR_FP)) { in flush_vsx_to_thread()
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| H A D | signal_64.c | 163 msr &= ~MSR_VSX; in __unsafe_setup_sigcontext()
176 msr |= MSR_VSX; in __unsafe_setup_sigcontext()
237 msr |= tsk->thread.ckpt_regs.msr & (MSR_FP | MSR_VEC | MSR_VSX); in setup_tm_sigcontexts()
302 if (msr & MSR_VSX) in setup_tm_sigcontexts()
310 msr |= MSR_VSX; in setup_tm_sigcontexts()
387 regs_set_return_msr(regs, regs->msr & ~(MSR_FP | MSR_FE0 | MSR_FE1 | MSR_VEC | MSR_VSX)); in __unsafe_restore_sigcontext()
418 if ((msr & MSR_VSX) != 0) { in __unsafe_restore_sigcontext()
506 regs_set_return_msr(regs, regs->msr & ~(MSR_FP | MSR_FE0 | MSR_FE1 | MSR_VEC | MSR_VSX)); in restore_tm_sigcontexts()
552 if (v_regs && ((msr & MSR_VSX) != 0)) { in restore_tm_sigcontexts()
678 (new_msr & MSR_VSX)) in SYSCALL_DEFINE3()
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| H A D | signal_32.c | 302 msr &= ~MSR_VSX; in __unsafe_save_user_regs()
312 msr |= MSR_VSX; in __unsafe_save_user_regs()
431 if (msr & MSR_VSX) in save_tm_user_regs_unsafe()
436 msr |= MSR_VSX; in save_tm_user_regs_unsafe()
520 regs_set_return_msr(regs, regs->msr & ~MSR_VSX); in restore_user_regs()
521 if (msr & MSR_VSX) { in restore_user_regs()
621 regs_set_return_msr(regs, regs->msr & ~MSR_VSX); in restore_tm_user_regs()
622 if (msr & MSR_VSX) { in restore_tm_user_regs()
653 if (msr & MSR_VSX) { in restore_tm_user_regs()
1029 (new_msr & MSR_VSX)) in COMPAT_SYSCALL_DEFINE3()
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| H A D | fpu.S | 104 oris r5,r5,MSR_VSX@h
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| H A D | tm.S | 142 oris r15,r15, MSR_VSX@h
393 oris r5,r5, MSR_VSX@h
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| H A D | interrupt.c | 211 mathflags |= MSR_VEC | MSR_VSX; in interrupt_exit_user_prepare_main()
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| H A D | vector.S | 147 oris r12,r12,MSR_VSX@h
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| H A D | traps.c | 975 msr_mask = MSR_VSX; in p9_hmi_special_emu()
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| H A D | exceptions-64s.S | 2672 oris r10,r10,MSR_VSX@h
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| /openbmc/linux/arch/powerpc/lib/ |
| H A D | ldstfp.S | 162 oris r7,r6,MSR_VSX@h
189 oris r7,r6,MSR_VSX@h
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| H A D | test_emulate_step.c | 72 regs->msr |= MSR_VSX; in init_pt_regs()
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| H A D | sstep.c | 3450 unsigned long msrbit = MSR_VSX; in emulate_loadstore()
3521 unsigned long msrbit = MSR_VSX; in emulate_loadstore()
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| /openbmc/linux/arch/powerpc/kvm/ |
| H A D | emulate_loadstore.c | 42 if (!(kvmppc_get_msr(vcpu) & MSR_VSX)) { in kvmppc_check_vsx_disabled()
316 MSR_VSX); in kvmppc_emulate_loadstore()
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| H A D | book3s_pr.c | 184 kvmppc_giveup_ext(vcpu, MSR_FP | MSR_VEC | MSR_VSX); in kvmppc_core_vcpu_put_pr()
368 (MSR_FP | MSR_VEC | MSR_VSX); in kvmppc_handle_lost_math_exts()
391 kvmppc_giveup_ext(vcpu, MSR_VSX); in kvmppc_save_tm_pr()
812 if (msr & MSR_VSX) in kvmppc_giveup_ext()
842 vcpu->arch.guest_owned_ext &= ~(msr | MSR_VSX); in kvmppc_giveup_ext()
880 if (msr == MSR_VSX) { in kvmppc_handle_ext()
894 msr = MSR_FP | MSR_VEC | MSR_VSX; in kvmppc_handle_ext()
1378 ext_msr = MSR_VSX; in kvmppc_handle_exit_pr()
1856 kvmppc_giveup_ext(vcpu, MSR_FP | MSR_VEC | MSR_VSX); in kvmppc_vcpu_run_pr()
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| H A D | tm.S | 45 oris r8, r8, (MSR_VEC | MSR_VSX)@h
239 oris r5, r5, (MSR_VEC | MSR_VSX)@h
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| H A D | book3s_emulate.c | 177 kvmppc_giveup_ext(vcpu, MSR_VSX); in kvmppc_emulate_trchkpt()
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| H A D | book3s_hv_p9_entry.c | 506 msr_needed |= MSR_VSX; in kvmppc_msr_hard_disable_set_facilities()
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| H A D | book3s_hv_rmhandlers.S | 2454 oris r8,r8,MSR_VSX@h
2490 oris r8,r8,MSR_VSX@h
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| H A D | powerpc.c | 1211 vcpu->kvm->arch.kvm_ops->giveup_ext(vcpu, MSR_VSX); in kvmppc_complete_mmio_load()
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| /openbmc/linux/arch/powerpc/include/asm/ |
| H A D | switch_to.h | 81 msr_check_and_clear(MSR_FP|MSR_VEC|MSR_VSX); in disable_kernel_vsx()
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| H A D | reg.h | 89 #define MSR_VSX __MASK(MSR_VSX_LG) /* Enable VSX */ macro
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| /openbmc/qemu/target/ppc/ |
| H A D | cpu_init.h | 35 (1ull << MSR_VSX) | \
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| H A D | helper_regs.c | 175 QEMU_BUILD_BUG_ON(MSR_VSX != HFLAGS_VSX); in hreg_compute_hflags_value()
176 msr_mask |= 1 << MSR_VSX; in hreg_compute_hflags_value()
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| H A D | cpu.h | 438 #define MSR_VSX PPC_BIT_NR(40) /* Vector Scalar Extension (>= 2.06)x hflags */ macro
488 FIELD(MSR, VSX, MSR_VSX, 1)
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| H A D | cpu_init.c | 6184 (1ull << MSR_VSX) | in POWERPC_FAMILY()
6353 (1ull << MSR_VSX) | in POWERPC_FAMILY()
7216 msr |= (target_ulong)1 << MSR_VSX; /* Allow VSX usage */ in ppc_cpu_reset_hold()
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