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Searched refs:MRSHPC_MW0CR2 (Results 1 – 7 of 7) sorted by relevance

/openbmc/u-boot/drivers/pcmcia/
H A Dmarubun_pcmcia.c35 #define MRSHPC_MW0CR2 (CONFIG_SYS_MARUBUN_MRSHPC + 22) macro
65 outw(0x0b00,MRSHPC_MW0CR2); /* common mode & bus width 16bit SWAP = 1 */ in pcmcia_on()
67 outw(0x0300,MRSHPC_MW0CR2); /* common mode & bus width 16bit SWAP = 0 */ in pcmcia_on()
/openbmc/linux/arch/sh/include/mach-se/mach/
H A Dmrshpc.h26 __raw_writew(0x0b00, MRSHPC_MW0CR2); in mrshpc_setup_windows()
29 __raw_writew(0x0300, MRSHPC_MW0CR2); in mrshpc_setup_windows()
H A Dse7751.h54 #define MRSHPC_MW0CR2 (PA_MRSHPC + 22) macro
H A Dse7721.h43 #define MRSHPC_MW0CR2 (PA_MRSHPC + 22) macro
H A Dse7722.h44 #define MRSHPC_MW0CR2 (PA_MRSHPC + 22) macro
H A Dse.h59 #define MRSHPC_MW0CR2 (PA_MRSHPC + 22) macro
H A Dse7343.h46 #define MRSHPC_MW0CR2 (PA_MRSHPC + 22) macro