Home
last modified time | relevance | path

Searched refs:MO_TEUL (Results 1 – 21 of 21) sorted by relevance

/openbmc/qemu/target/loongarch/tcg/insn_trans/
H A Dtrans_fmemory.c.inc143 TRANS(fld_s, FP_SP, gen_fload_i, MO_TEUL)
144 TRANS(fst_s, FP_SP, gen_fstore_i, MO_TEUL)
147 TRANS(fldx_s, FP_SP, gen_floadx, MO_TEUL)
149 TRANS(fstx_s, FP_SP, gen_fstorex, MO_TEUL)
151 TRANS(fldgt_s, FP_SP, gen_fload_gt, MO_TEUL)
153 TRANS(fldle_s, FP_SP, gen_fload_le, MO_TEUL)
155 TRANS(fstgt_s, FP_SP, gen_fstore_gt, MO_TEUL)
157 TRANS(fstle_s, FP_SP, gen_fstore_le, MO_TEUL)
H A Dtrans_memory.c.inc159 TRANS(st_w, ALL, gen_store, MO_TEUL)
163 TRANS(ld_wu, 64, gen_load, MO_TEUL)
170 TRANS(stx_w, 64, gen_storex, MO_TEUL)
174 TRANS(ldx_wu, 64, gen_loadx, MO_TEUL)
176 TRANS(stptr_w, 64, gen_stptr, MO_TEUL)
189 TRANS(stgt_w, 64, gen_store_gt, MO_TEUL)
193 TRANS(stle_w, 64, gen_store_le, MO_TEUL)
/openbmc/qemu/target/sh4/
H A Dtranslate.c497 MO_TEUL | UNALIGN(ctx)); in _decode_opc()
569 MO_TEUL | UNALIGN(ctx)); in _decode_opc()
605 MO_TEUL | UNALIGN(ctx)); in _decode_opc()
646 MO_TEUL | UNALIGN(ctx)); in _decode_opc()
981 MO_TEUL | MO_ALIGN); in _decode_opc()
993 MO_TEUL | MO_ALIGN); in _decode_opc()
1006 MO_TEUL | MO_ALIGN); in _decode_opc()
1023 MO_TEUL | MO_ALIGN); in _decode_opc()
1040 MO_TEUL | MO_ALIGN); in _decode_opc()
1056 MO_TEUL | MO_ALIGN); in _decode_opc()
[all …]
/openbmc/qemu/target/riscv/insn_trans/
H A Dtrans_xthead.c.inc390 return gen_fload_idx(ctx, a, MO_TEUL, false);
406 return gen_fload_idx(ctx, a, MO_TEUL, true);
422 return gen_fstore_idx(ctx, a, MO_TEUL, false);
438 return gen_fstore_idx(ctx, a, MO_TEUL, true);
627 return gen_load_inc(ctx, a, MO_TEUL, false);
634 return gen_load_inc(ctx, a, MO_TEUL, true);
785 return gen_load_idx(ctx, a, MO_TEUL, false);
853 return gen_load_idx(ctx, a, MO_TEUL, true);
946 return gen_loadpair_tl(ctx, a, MO_TEUL, 3);
H A Dtrans_rvzce.c.inc178 MemOp memop = get_ol(ctx) == MXL_RV32 ? MO_TEUL : MO_TEUQ;
223 MemOp memop = get_ol(ctx) == MXL_RV32 ? MO_TEUL : MO_TEUQ;
H A Dtrans_rvf.c.inc46 MemOp memop = MO_TEUL;
68 MemOp memop = MO_TEUL;
H A Dtrans_rvi.c.inc383 return gen_load(ctx, a, MO_TEUL);
/openbmc/qemu/target/microblaze/
H A Dtranslate.c813 return do_load(dc, arg->rd, addr, MO_TEUL, dc->mem_index, false); in trans_lw()
819 return do_load(dc, arg->rd, addr, MO_TEUL, dc->mem_index, true); in trans_lwr()
831 return do_load(dc, arg->rd, addr, MO_TEUL, MMU_NOMMU_IDX, false); in trans_lwea()
838 return do_load(dc, arg->rd, addr, MO_TEUL, dc->mem_index, false); in trans_lwi()
848 tcg_gen_qemu_ld_i32(cpu_res_val, addr, dc->mem_index, MO_TEUL); in trans_lwx()
963 return do_store(dc, arg->rd, addr, MO_TEUL, dc->mem_index, false); in trans_sw()
969 return do_store(dc, arg->rd, addr, MO_TEUL, dc->mem_index, true); in trans_swr()
981 return do_store(dc, arg->rd, addr, MO_TEUL, MMU_NOMMU_IDX, false); in trans_swea()
988 return do_store(dc, arg->rd, addr, MO_TEUL, dc->mem_index, false); in trans_swi()
1017 dc->mem_index, MO_TEUL); in trans_swx()
/openbmc/qemu/include/exec/
H A Dmemop.h140 MO_TEUL = MO_TE | MO_UL, enumerator
/openbmc/qemu/target/riscv/
H A Dop_helper.c491 MemOpIdx oi = make_memop_idx(MO_TEUL, mmu_idx); in helper_hyp_hlv_wu()
527 MemOpIdx oi = make_memop_idx(MO_TEUL, mmu_idx); in helper_hyp_hsv_w()
561 MemOpIdx oi = make_memop_idx(MO_TEUL, mmu_idx); in helper_hyp_hlvx_wu()
/openbmc/qemu/target/s390x/tcg/
H A Dtranslate.c2420 tcg_gen_qemu_ld_i64(tmp, o->in2, get_mem_index(s), MO_TEUL); in op_icm()
2762 MO_TEUL | s->insn->data); in op_ld32u()
2810 tcg_gen_qemu_ld_i64(o->out, o->in2, get_mem_index(s), MO_TEUL); in op_llgfat()
2951 tcg_gen_qemu_ld_i64(t1, o->in2, get_mem_index(s), MO_TEUL); in op_lm32()
2959 tcg_gen_qemu_ld_i64(t1, o->in2, get_mem_index(s), MO_TEUL); in op_lm32()
2961 tcg_gen_qemu_ld_i64(t2, t2, get_mem_index(s), MO_TEUL); in op_lm32()
2976 tcg_gen_qemu_ld_i64(t1, o->in2, get_mem_index(s), MO_TEUL); in op_lm32()
2991 tcg_gen_qemu_ld_i64(t1, o->in2, get_mem_index(s), MO_TEUL); in op_lmh()
2999 tcg_gen_qemu_ld_i64(t1, o->in2, get_mem_index(s), MO_TEUL); in op_lmh()
3001 tcg_gen_qemu_ld_i64(t2, t2, get_mem_index(s), MO_TEUL); in op_lmh()
[all …]
H A Dinsn-data.h.inc77 D(0xeb6e, ALSI, SIY, GIE, la1, i2_32u, new, 0, asi, addu32, MO_TEUL)
273 D(0xba00, CS, RS_a, Z, r3_32u, r1_32u, new, r1_32, cs, 0, MO_TEUL)
274 D(0xeb14, CSY, RSY_a, LD, r3_32u, r1_32u, new, r1_32, cs, 0, MO_TEUL)
449 D(0xebfa, LAAL, RSY_a, ILA, r3_32u, a2, new, in2_r1_32, laa, addu32, MO_TEUL)
575 D(0xc804, LPD, SSF, ILA, 0, 0, new_P, r3_P32, lpd, 0, MO_TEUL)
1336 E(0xb250, CSP, RRE, Z, r1_32u, ra2, r1_P, 0, csp, 0, MO_TEUL, IF_PRIV)
1360 E(0xb24b, LURA, RRE, Z, 0, ra2, new, r1_32, lura, 0, MO_TEUL, IF_PRIV)
1414 E(0xb246, STURA, RRE, Z, r1_o, ra2, 0, 0, stura, 0, MO_TEUL, IF_PRIV)
/openbmc/qemu/target/xtensa/
H A Dtranslate.c1627 mop = gen_load_store_alignment(dc, MO_TEUL, addr); in translate_l32e()
1654 mop = gen_load_store_alignment(dc, MO_TEUL | MO_ALIGN, addr); in translate_l32ex()
1700 tcg_gen_qemu_ld_i32(arg[0].out, tmp, dc->cring, MO_TEUL); in translate_l32r()
1754 mop = gen_load_store_alignment(dc, MO_TEUL, vaddr); in translate_mac16()
2183 mop = gen_load_store_alignment(dc, MO_TEUL | MO_ALIGN, addr); in translate_s32c1i()
2196 mop = gen_load_store_alignment(dc, MO_TEUL, addr); in translate_s32e()
2211 mop = gen_load_store_alignment(dc, MO_TEUL | MO_ALIGN, addr); in translate_s32ex()
3164 .par = (const uint32_t[]){MO_TEUL | MO_ALIGN, true, false},
3179 .par = (const uint32_t[]){MO_TEUL, false, false},
4502 .par = (const uint32_t[]){MO_TEUL, false, true},
[all …]
/openbmc/qemu/target/openrisc/
H A Dtranslate.c650 tcg_gen_qemu_ld_tl(cpu_R(dc, a->d), ea, dc->mem_idx, MO_TEUL); in trans_l_lwa()
668 do_load(dc, a, MO_TEUL); in trans_l_lwz()
716 cpu_R(dc, a->b), dc->mem_idx, MO_TEUL); in trans_l_swa()
738 do_store(dc, a, MO_TEUL); in trans_l_sw()
/openbmc/qemu/target/m68k/
H A Dtranslate.c951 tcg_gen_qemu_ld_tl(tmp, addr, index, MO_TEUL); in gen_load_fp()
963 tcg_gen_qemu_ld_i32(tmp, addr, index, MO_TEUL); in gen_load_fp()
999 tcg_gen_qemu_st_tl(tmp, addr, index, MO_TEUL); in gen_store_fp()
1012 tcg_gen_qemu_st_i32(tmp, addr, index, MO_TEUL); in gen_store_fp()
4764 tcg_gen_qemu_st_tl(tmp, addr, index, MO_TEUL); in gen_qemu_store_fcr()
4773 tcg_gen_qemu_ld_tl(tmp, addr, index, MO_TEUL); in gen_qemu_load_fcr()
/openbmc/qemu/target/sparc/
H A Dtranslate.c4391 TRANS(LDUW, ALL, do_ld_gpr, a, MO_TEUL) in TRANS() argument
4414 TRANS(STW, ALL, do_st_gpr, a, MO_TEUL) in TRANS() argument
4479 da = resolve_asi(dc, a->asi, MO_TEUL); in trans_SWAP()
4507 TRANS(CASA, CASA, do_casa, a, MO_TEUL) in TRANS() argument
4618 tcg_gen_qemu_ld_i32(tmp, addr, dc->mem_idx, MO_TEUL | MO_ALIGN); in trans_LDFSR()
4685 TRANS(STFSR, ALL, do_stfsr, a, MO_TEUL) in TRANS() argument
/openbmc/qemu/target/hexagon/
H A Dmacros.h133 tcg_gen_qemu_ld_tl(DST, VA, ctx->mem_idx, MO_TEUL); \
H A Dtranslate.c709 ctx->mem_idx, MO_TEUL); in process_store()
H A Dgenptr.c339 tcg_gen_qemu_ld_tl(dest, vaddr, mem_index, MO_TEUL); in gen_load_locked4u()
/openbmc/qemu/target/hppa/
H A Dtranslate.c1694 do_load_32(ctx, tmp, rb, rx, scale, disp, sp, modify, MO_TEUL); in do_floadw()
1753 do_store_32(ctx, tmp, rb, rx, scale, disp, sp, modify, MO_TEUL); in do_fstorew()
/openbmc/qemu/accel/tcg/
H A Dcputlb.c2913 MemOpIdx oi = make_memop_idx(MO_TEUL, cpu_mmu_index(cs, true)); in cpu_ldl_code()