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Searched refs:MMTE_M_PM_INSN (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/target/riscv/
H A Dcpu_bits.h831 #define MMTE_M_PM_INSN M_PM_INSN macro
834 MMTE_M_PM_ENABLE | MMTE_M_PM_CURRENT | MMTE_M_PM_INSN | \
H A Dcsr.c4413 wpri_val &= ~(MMTE_M_PM_INSN | MMTE_S_PM_INSN | MMTE_U_PM_INSN); in write_mmte()