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Searched refs:MIP_VSEIP (Results 1 – 4 of 4) sorted by relevance

/openbmc/qemu/target/riscv/
H A Dcpu_bits.h736 #define MIP_VSEIP (1 << IRQ_VS_EXT) macro
758 #define VS_MODE_INTERRUPTS ((uint64_t)(MIP_VSSIP | MIP_VSTIP | MIP_VSEIP))
H A Dcpu_helper.c462 uint64_t vsgein = (env->hgeip & (1ULL << gein)) ? MIP_VSEIP : 0; in riscv_cpu_all_pending()
471 ~(MIP_SGEIP | MIP_VSSIP | MIP_VSTIP | MIP_VSEIP); in riscv_cpu_mirq_pending()
480 ~(MIP_VSSIP | MIP_VSTIP | MIP_VSEIP); in riscv_cpu_sirq_pending()
722 vsgein = (env->hgeip & (1ULL << gein)) ? MIP_VSEIP : 0; in riscv_cpu_interrupt()
H A Dcsr.c1450 MIP_VSEIP | LOCAL_INTERRUPTS;
2778 old_mip |= (env->hgeip & ((target_ulong)1 << gin)) ? MIP_VSEIP : 0; in rmw_mip64()
3419 vsgein = (env->hgeip & (1ULL << gein)) ? MIP_VSEIP : 0; in read_vstopi()
3420 vseip = env->mie & (env->mip | vsgein) & MIP_VSEIP; in read_vstopi()
/openbmc/qemu/target/riscv/tcg/
H A Dtcg-cpu.c1007 env->mideleg = MIP_VSSIP | MIP_VSTIP | MIP_VSEIP | MIP_SGEIP; in riscv_tcg_cpu_realize()