Searched refs:MIP_STIP (Results 1 – 4 of 4) sorted by relevance
| /openbmc/qemu/target/riscv/ |
| H A D | time_helper.c | 36 riscv_cpu_update_mip(&cpu->env, MIP_STIP, BOOL_TO_MASK(1)); in riscv_stimer_cb()
61 riscv_cpu_update_mip(env, MIP_STIP, BOOL_TO_MASK(1)); in riscv_timer_write_timecmp()
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| H A D | cpu_bits.h | 731 #define MIP_STIP (1 << IRQ_S_TIMER) macro
743 #define SIP_STIP MIP_STIP
757 #define S_MODE_INTERRUPTS ((uint64_t)(MIP_SSIP | MIP_STIP | MIP_SEIP))
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| H A D | csr.c | 1359 riscv_timer_write_timecmp(env, env->stimer, env->stimecmp, 0, MIP_STIP); in write_stimecmp()
1375 riscv_timer_write_timecmp(env, env->stimer, env->stimecmp, 0, MIP_STIP); in write_stimecmph()
1442 static const uint64_t mvip_writable_mask = MIP_SSIP | MIP_STIP | MIP_SEIP |
2767 mask = mask & ~(MIP_STIP | MIP_VSTIP); in rmw_mip64()
2858 (env->mideleg | ~env->mvien)) | MIP_STIP; in rmw_mvip64()
2885 alias_mask &= ~MIP_STIP; in rmw_mvip64()
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| /openbmc/u-boot/arch/riscv/include/asm/ |
| H A D | encoding.h | 54 #define MIP_STIP BIT(IRQ_S_TIMER) macro
62 #define SIP_STIP MIP_STIP
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