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Searched refs:MIP_SSIP (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/riscv/include/asm/
H A Dencoding.h51 #define MIP_SSIP BIT(IRQ_S_SOFT) macro
61 #define SIP_SSIP MIP_SSIP
/openbmc/qemu/target/riscv/
H A Dcpu_bits.h727 #define MIP_SSIP (1 << IRQ_S_SOFT) macro
742 #define SIP_SSIP MIP_SSIP
757 #define S_MODE_INTERRUPTS ((uint64_t)(MIP_SSIP | MIP_STIP | MIP_SEIP))
H A Dcsr.c1442 static const uint64_t mvip_writable_mask = MIP_SSIP | MIP_STIP | MIP_SEIP |
1444 static const uint64_t mvien_writable_mask = MIP_SSIP | MIP_SEIP |