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Searched refs:MHPMEVENT_BIT_VUINH (Results 1 – 3 of 3) sorted by relevance

/openbmc/qemu/target/riscv/
H A Dcpu_bits.h943 #define MHPMEVENT_BIT_VUINH BIT_ULL(58) macro
950 MHPMEVENT_BIT_VUINH)
H A Dpmu.c158 (env->mhpmevent_val[ctr_idx] & MHPMEVENT_BIT_VUINH)) || in riscv_pmu_incr_ctr_rv64()
H A Dcsr.c993 riscv_has_ext(env, RVU)) ? MHPMEVENT_BIT_VUINH : 0; in write_mhpmevent()