Searched refs:MDREFR_SLFRSH (Results 1 – 9 of 9) sorted by relevance
| /openbmc/u-boot/arch/arm/cpu/pxa/ |
| H A D | pxa2xx.c | 107 tmp |= MDREFR_K0RUN | MDREFR_SLFRSH; in pxa2xx_dram_init()
129 writelrb(CONFIG_SYS_MDREFR_VAL & ~MDREFR_SLFRSH, MDREFR); in pxa2xx_dram_init()
281 writel(MDREFR_SLFRSH, MDREFR); in reset_cpu()
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| /openbmc/linux/arch/arm/mach-sa1100/ |
| H A D | sleep.S | 100 orr r8, r7, #MDREFR_SLFRSH
107 bic r11, r8, #MDREFR_SLFRSH
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| /openbmc/linux/arch/arm/mach-pxa/ |
| H A D | reset.c | 84 writel_relaxed(MDREFR_SLFRSH, MDREFR); in do_hw_reset()
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| H A D | smemc.h | 61 #define MDREFR_SLFRSH (1 << 22) /* SDRAM Self-Refresh Control/Status */ macro
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| H A D | sleep.S | 60 orr r5, r5, #MDREFR_SLFRSH
101 orr r5, r5, #MDREFR_SLFRSH
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| /openbmc/linux/drivers/clk/pxa/ |
| H A D | clk-pxa.c | 26 #define MDREFR_SLFRSH (1 << 22) /* SDRAM Self-Refresh Control/Status */ macro
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| /openbmc/linux/arch/arm/mach-sa1100/include/mach/ |
| H A D | SA-1100.h | 1555 #define MDREFR_SLFRSH (1 << 31) macro
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| /openbmc/u-boot/arch/arm/include/asm/arch-pxa/ |
| H A D | pxa-regs.h | 2474 #define MDREFR_SLFRSH (1 << 22) /* SDRAM Self-Refresh Control/Status */ macro
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| /openbmc/u-boot/include/ |
| H A D | SA-1100.h | 2060 #define MDREFR_SLFRSH (1 << 31) macro
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