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Searched refs:MDCNFG_DE2 (Results 1 – 7 of 7) sorted by relevance

/openbmc/u-boot/arch/arm/cpu/pxa/
H A Dpxa2xx.c138 ~(MDCNFG_DE0 | MDCNFG_DE1 | MDCNFG_DE2 | MDCNFG_DE3), MDCNFG); in pxa2xx_dram_init()
158 (MDCNFG_DE0 | MDCNFG_DE1 | MDCNFG_DE2 | MDCNFG_DE3); in pxa2xx_dram_init()
/openbmc/linux/arch/arm/mach-pxa/
H A Dpxa2xx.c42 if (mdcnfg & (MDCNFG_DE2 | MDCNFG_DE3)) in pxa2xx_smemc_get_sdram_rows()
H A Dsmemc.h54 #define MDCNFG_DE2 (1 << 16) /* SDRAM Bank 2 Enable */ macro
/openbmc/linux/arch/arm/mach-sa1100/
H A Dsleep.S105 bic r10, r10, #(MDCNFG_DE2+MDCNFG_DE3)
/openbmc/linux/arch/arm/mach-sa1100/include/mach/
H A DSA-1100.h1378 #define MDCNFG_DE2 MDCNFG_DE (2) /* DRAM Enable bank 2 */ macro
/openbmc/u-boot/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h2446 #define MDCNFG_DE2 0x00010000 macro
/openbmc/u-boot/include/
H A DSA-1100.h1843 #define MDCNFG_DE2 MDCNFG_DE (2) /* DRAM Enable bank 2 */ macro