Searched refs:MDCNFG_DE1 (Results 1 – 7 of 7) sorted by relevance
138 ~(MDCNFG_DE0 | MDCNFG_DE1 | MDCNFG_DE2 | MDCNFG_DE3), MDCNFG); in pxa2xx_dram_init()158 (MDCNFG_DE0 | MDCNFG_DE1 | MDCNFG_DE2 | MDCNFG_DE3); in pxa2xx_dram_init()
45 if (mdcnfg & (MDCNFG_DE0 | MDCNFG_DE1)) in pxa2xx_smemc_get_sdram_rows()
53 #define MDCNFG_DE1 (1 << 1) /* SDRAM Bank 1 Enable */ macro
104 bic r10, r10, #(MDCNFG_DE0+MDCNFG_DE1)
1377 #define MDCNFG_DE1 MDCNFG_DE (1) /* DRAM Enable bank 1 */ macro
2445 #define MDCNFG_DE1 0x00000002 macro
1842 #define MDCNFG_DE1 MDCNFG_DE (1) /* DRAM Enable bank 1 */ macro